1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-footbridge/include/mach/memory.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1996-1999 Russell King. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Changelog: 8*4882a593Smuzhiyun * 20-Oct-1996 RMK Created 9*4882a593Smuzhiyun * 31-Dec-1997 RMK Fixed definitions to reduce warnings. 10*4882a593Smuzhiyun * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. 11*4882a593Smuzhiyun * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. 12*4882a593Smuzhiyun * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. 13*4882a593Smuzhiyun * Renamed to memory.h 14*4882a593Smuzhiyun * Moved PAGE_OFFSET and TASK_SIZE here 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun #ifndef __ASM_ARCH_MEMORY_H 17*4882a593Smuzhiyun #define __ASM_ARCH_MEMORY_H 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #if defined(CONFIG_FOOTBRIDGE_ADDIN) 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * If we may be using add-in footbridge mode, then we must 23*4882a593Smuzhiyun * use the out-of-line translation that makes use of the 24*4882a593Smuzhiyun * PCI BAR 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 27*4882a593Smuzhiyun extern unsigned long __virt_to_bus(unsigned long); 28*4882a593Smuzhiyun extern unsigned long __bus_to_virt(unsigned long); 29*4882a593Smuzhiyun extern unsigned long __pfn_to_bus(unsigned long); 30*4882a593Smuzhiyun extern unsigned long __bus_to_pfn(unsigned long); 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun #define __virt_to_bus __virt_to_bus 33*4882a593Smuzhiyun #define __bus_to_virt __bus_to_virt 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #elif defined(CONFIG_FOOTBRIDGE_HOST) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * The footbridge is programmed to expose the system RAM at 0xe0000000. 39*4882a593Smuzhiyun * The requirement is that the RAM isn't placed at bus address 0, which 40*4882a593Smuzhiyun * would clash with VGA cards. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun #define BUS_OFFSET 0xe0000000 43*4882a593Smuzhiyun #define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) 44*4882a593Smuzhiyun #define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) 45*4882a593Smuzhiyun #define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET)) 46*4882a593Smuzhiyun #define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET)) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #else 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #error "Undefined footbridge mode" 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #endif 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* 55*4882a593Smuzhiyun * Cache flushing area. 56*4882a593Smuzhiyun */ 57*4882a593Smuzhiyun #define FLUSH_BASE 0xf9000000 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define FLUSH_BASE_PHYS 0x50000000 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #endif 62