1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-footbridge/include/mach/irqs.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1998 Russell King 6*4882a593Smuzhiyun * Copyright (C) 1998 Phil Blundell 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Changelog: 9*4882a593Smuzhiyun * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder 10*4882a593Smuzhiyun * 01-Feb-1999 PJB ISA IRQs start at 0 not 16 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun #include <asm/mach-types.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define NR_IRQS 36 15*4882a593Smuzhiyun #define NR_DC21285_IRQS 16 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define _ISA_IRQ(x) (0 + (x)) 18*4882a593Smuzhiyun #define _ISA_INR(x) ((x) - 0) 19*4882a593Smuzhiyun #define _DC21285_IRQ(x) (16 + (x)) 20*4882a593Smuzhiyun #define _DC21285_INR(x) ((x) - 16) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* 23*4882a593Smuzhiyun * This is a list of all interrupts that the 21285 24*4882a593Smuzhiyun * can generate and we handle. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define IRQ_CONRX _DC21285_IRQ(0) 27*4882a593Smuzhiyun #define IRQ_CONTX _DC21285_IRQ(1) 28*4882a593Smuzhiyun #define IRQ_TIMER1 _DC21285_IRQ(2) 29*4882a593Smuzhiyun #define IRQ_TIMER2 _DC21285_IRQ(3) 30*4882a593Smuzhiyun #define IRQ_TIMER3 _DC21285_IRQ(4) 31*4882a593Smuzhiyun #define IRQ_IN0 _DC21285_IRQ(5) 32*4882a593Smuzhiyun #define IRQ_IN1 _DC21285_IRQ(6) 33*4882a593Smuzhiyun #define IRQ_IN2 _DC21285_IRQ(7) 34*4882a593Smuzhiyun #define IRQ_IN3 _DC21285_IRQ(8) 35*4882a593Smuzhiyun #define IRQ_DOORBELLHOST _DC21285_IRQ(9) 36*4882a593Smuzhiyun #define IRQ_DMA1 _DC21285_IRQ(10) 37*4882a593Smuzhiyun #define IRQ_DMA2 _DC21285_IRQ(11) 38*4882a593Smuzhiyun #define IRQ_PCI _DC21285_IRQ(12) 39*4882a593Smuzhiyun #define IRQ_SDRAMPARITY _DC21285_IRQ(13) 40*4882a593Smuzhiyun #define IRQ_I2OINPOST _DC21285_IRQ(14) 41*4882a593Smuzhiyun #define IRQ_PCI_ABORT _DC21285_IRQ(15) 42*4882a593Smuzhiyun #define IRQ_PCI_SERR _DC21285_IRQ(16) 43*4882a593Smuzhiyun #define IRQ_DISCARD_TIMER _DC21285_IRQ(17) 44*4882a593Smuzhiyun #define IRQ_PCI_DPERR _DC21285_IRQ(18) 45*4882a593Smuzhiyun #define IRQ_PCI_PERR _DC21285_IRQ(19) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define IRQ_ISA_TIMER _ISA_IRQ(0) 48*4882a593Smuzhiyun #define IRQ_ISA_KEYBOARD _ISA_IRQ(1) 49*4882a593Smuzhiyun #define IRQ_ISA_CASCADE _ISA_IRQ(2) 50*4882a593Smuzhiyun #define IRQ_ISA_UART2 _ISA_IRQ(3) 51*4882a593Smuzhiyun #define IRQ_ISA_UART _ISA_IRQ(4) 52*4882a593Smuzhiyun #define IRQ_ISA_FLOPPY _ISA_IRQ(6) 53*4882a593Smuzhiyun #define IRQ_ISA_PRINTER _ISA_IRQ(7) 54*4882a593Smuzhiyun #define IRQ_ISA_RTC_ALARM _ISA_IRQ(8) 55*4882a593Smuzhiyun #define IRQ_ISA_2 _ISA_IRQ(9) 56*4882a593Smuzhiyun #define IRQ_ISA_PS2MOUSE _ISA_IRQ(12) 57*4882a593Smuzhiyun #define IRQ_ISA_HARDDISK1 _ISA_IRQ(14) 58*4882a593Smuzhiyun #define IRQ_ISA_HARDDISK2 _ISA_IRQ(15) 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define IRQ_MASK_UART_RX (1 << 2) 61*4882a593Smuzhiyun #define IRQ_MASK_UART_TX (1 << 3) 62*4882a593Smuzhiyun #define IRQ_MASK_TIMER1 (1 << 4) 63*4882a593Smuzhiyun #define IRQ_MASK_TIMER2 (1 << 5) 64*4882a593Smuzhiyun #define IRQ_MASK_TIMER3 (1 << 6) 65*4882a593Smuzhiyun #define IRQ_MASK_IN0 (1 << 8) 66*4882a593Smuzhiyun #define IRQ_MASK_IN1 (1 << 9) 67*4882a593Smuzhiyun #define IRQ_MASK_IN2 (1 << 10) 68*4882a593Smuzhiyun #define IRQ_MASK_IN3 (1 << 11) 69*4882a593Smuzhiyun #define IRQ_MASK_DOORBELLHOST (1 << 15) 70*4882a593Smuzhiyun #define IRQ_MASK_DMA1 (1 << 16) 71*4882a593Smuzhiyun #define IRQ_MASK_DMA2 (1 << 17) 72*4882a593Smuzhiyun #define IRQ_MASK_PCI (1 << 18) 73*4882a593Smuzhiyun #define IRQ_MASK_SDRAMPARITY (1 << 24) 74*4882a593Smuzhiyun #define IRQ_MASK_I2OINPOST (1 << 25) 75*4882a593Smuzhiyun #define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30)) 76*4882a593Smuzhiyun #define IRQ_MASK_PCI_SERR (1 << 23) 77*4882a593Smuzhiyun #define IRQ_MASK_DISCARD_TIMER (1 << 27) 78*4882a593Smuzhiyun #define IRQ_MASK_PCI_DPERR (1 << 28) 79*4882a593Smuzhiyun #define IRQ_MASK_PCI_PERR (1 << 31) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* 82*4882a593Smuzhiyun * Netwinder interrupt allocations 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun #define IRQ_NETWINDER_ETHER10 IRQ_IN0 85*4882a593Smuzhiyun #define IRQ_NETWINDER_ETHER100 IRQ_IN1 86*4882a593Smuzhiyun #define IRQ_NETWINDER_VIDCOMP IRQ_IN2 87*4882a593Smuzhiyun #define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5) 88*4882a593Smuzhiyun #define IRQ_NETWINDER_IR _ISA_IRQ(6) 89*4882a593Smuzhiyun #define IRQ_NETWINDER_BUTTON _ISA_IRQ(10) 90*4882a593Smuzhiyun #define IRQ_NETWINDER_VGA _ISA_IRQ(11) 91*4882a593Smuzhiyun #define IRQ_NETWINDER_SOUND _ISA_IRQ(12) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define I8042_KBD_IRQ IRQ_ISA_KEYBOARD 94*4882a593Smuzhiyun #define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) 95*4882a593Smuzhiyun #define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i) 98