1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-ep93xx/include/mach/uncompress.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <mach/ep93xx-regs.h> 9*4882a593Smuzhiyun #include <asm/mach-types.h> 10*4882a593Smuzhiyun __raw_readb(unsigned int ptr)11*4882a593Smuzhiyunstatic unsigned char __raw_readb(unsigned int ptr) 12*4882a593Smuzhiyun { 13*4882a593Smuzhiyun return *((volatile unsigned char *)ptr); 14*4882a593Smuzhiyun } 15*4882a593Smuzhiyun __raw_readl(unsigned int ptr)16*4882a593Smuzhiyunstatic unsigned int __raw_readl(unsigned int ptr) 17*4882a593Smuzhiyun { 18*4882a593Smuzhiyun return *((volatile unsigned int *)ptr); 19*4882a593Smuzhiyun } 20*4882a593Smuzhiyun __raw_writeb(unsigned char value,unsigned int ptr)21*4882a593Smuzhiyunstatic void __raw_writeb(unsigned char value, unsigned int ptr) 22*4882a593Smuzhiyun { 23*4882a593Smuzhiyun *((volatile unsigned char *)ptr) = value; 24*4882a593Smuzhiyun } 25*4882a593Smuzhiyun __raw_writel(unsigned int value,unsigned int ptr)26*4882a593Smuzhiyunstatic void __raw_writel(unsigned int value, unsigned int ptr) 27*4882a593Smuzhiyun { 28*4882a593Smuzhiyun *((volatile unsigned int *)ptr) = value; 29*4882a593Smuzhiyun } 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00) 32*4882a593Smuzhiyun #define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18) 33*4882a593Smuzhiyun #define UART_FLAG_TXFF 0x20 34*4882a593Smuzhiyun putc(int c)35*4882a593Smuzhiyunstatic inline void putc(int c) 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun int i; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun for (i = 0; i < 10000; i++) { 40*4882a593Smuzhiyun /* Transmit fifo not full? */ 41*4882a593Smuzhiyun if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)) 42*4882a593Smuzhiyun break; 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun __raw_writeb(c, PHYS_UART_DATA); 46*4882a593Smuzhiyun } 47*4882a593Smuzhiyun flush(void)48*4882a593Smuzhiyunstatic inline void flush(void) 49*4882a593Smuzhiyun { 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* 54*4882a593Smuzhiyun * Some bootloaders don't turn off DMA from the ethernet MAC before 55*4882a593Smuzhiyun * jumping to linux, which means that we might end up with bits of RX 56*4882a593Smuzhiyun * status and packet data scribbled over the uncompressed kernel image. 57*4882a593Smuzhiyun * Work around this by resetting the ethernet MAC before we uncompress. 58*4882a593Smuzhiyun */ 59*4882a593Smuzhiyun #define PHYS_ETH_SELF_CTL 0x80010020 60*4882a593Smuzhiyun #define ETH_SELF_CTL_RESET 0x00000001 61*4882a593Smuzhiyun ethernet_reset(void)62*4882a593Smuzhiyunstatic void ethernet_reset(void) 63*4882a593Smuzhiyun { 64*4882a593Smuzhiyun unsigned int v; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* Reset the ethernet MAC. */ 67*4882a593Smuzhiyun v = __raw_readl(PHYS_ETH_SELF_CTL); 68*4882a593Smuzhiyun __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL); 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* Wait for reset to finish. */ 71*4882a593Smuzhiyun while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET) 72*4882a593Smuzhiyun ; 73*4882a593Smuzhiyun } 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000 76*4882a593Smuzhiyun #define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000 77*4882a593Smuzhiyun #define TS72XX_WDT_FEED_VAL 0x05 78*4882a593Smuzhiyun ts72xx_watchdog_disable(void)79*4882a593Smuzhiyunstatic void __maybe_unused ts72xx_watchdog_disable(void) 80*4882a593Smuzhiyun { 81*4882a593Smuzhiyun __raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE); 82*4882a593Smuzhiyun __raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE); 83*4882a593Smuzhiyun } 84*4882a593Smuzhiyun arch_decomp_setup(void)85*4882a593Smuzhiyunstatic void arch_decomp_setup(void) 86*4882a593Smuzhiyun { 87*4882a593Smuzhiyun if (machine_is_ts72xx()) 88*4882a593Smuzhiyun ts72xx_watchdog_disable(); 89*4882a593Smuzhiyun ethernet_reset(); 90*4882a593Smuzhiyun } 91