xref: /OK3568_Linux_fs/kernel/arch/arm/mach-davinci/mux.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Pin-multiplex helper macros for TI DaVinci family devices
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * 2007 (c) MontaVista Software, Inc. This file is licensed under
7*4882a593Smuzhiyun  * the terms of the GNU General Public License version 2. This program
8*4882a593Smuzhiyun  * is licensed "as is" without any warranty of any kind, whether express
9*4882a593Smuzhiyun  * or implied.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * Copyright (C) 2008 Texas Instruments.
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #ifndef _MACH_DAVINCI_MUX_H_
14*4882a593Smuzhiyun #define _MACH_DAVINCI_MUX_H_
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <mach/mux.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
19*4882a593Smuzhiyun [soc##_##desc] = {							\
20*4882a593Smuzhiyun 			.name =  #desc,					\
21*4882a593Smuzhiyun 			.debug = dbg,					\
22*4882a593Smuzhiyun 			.mux_reg_name = "PINMUX"#muxreg,		\
23*4882a593Smuzhiyun 			.mux_reg = PINMUX(muxreg),			\
24*4882a593Smuzhiyun 			.mask_offset = mode_offset,			\
25*4882a593Smuzhiyun 			.mask = mode_mask,				\
26*4882a593Smuzhiyun 			.mode = mux_mode,				\
27*4882a593Smuzhiyun 		},
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)	\
30*4882a593Smuzhiyun [soc##_##desc] = {							\
31*4882a593Smuzhiyun 			.name =  #desc,					\
32*4882a593Smuzhiyun 			.debug = dbg,					\
33*4882a593Smuzhiyun 			.mux_reg_name = "INTMUX",			\
34*4882a593Smuzhiyun 			.mux_reg = INTMUX,				\
35*4882a593Smuzhiyun 			.mask_offset = mode_offset,			\
36*4882a593Smuzhiyun 			.mask = mode_mask,				\
37*4882a593Smuzhiyun 			.mode = mux_mode,				\
38*4882a593Smuzhiyun 		},
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)	\
41*4882a593Smuzhiyun [soc##_##desc] = {							\
42*4882a593Smuzhiyun 			.name =  #desc,					\
43*4882a593Smuzhiyun 			.debug = dbg,					\
44*4882a593Smuzhiyun 			.mux_reg_name = "EVTMUX",			\
45*4882a593Smuzhiyun 			.mux_reg = EVTMUX,				\
46*4882a593Smuzhiyun 			.mask_offset = mode_offset,			\
47*4882a593Smuzhiyun 			.mask = mode_mask,				\
48*4882a593Smuzhiyun 			.mode = mux_mode,				\
49*4882a593Smuzhiyun 		},
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #endif /* _MACH_DAVINCI_MUX_H */
52