1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * DaVinci serial device definitions 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * 2007 (c) MontaVista Software, Inc. This file is licensed under 7*4882a593Smuzhiyun * the terms of the GNU General Public License version 2. This program 8*4882a593Smuzhiyun * is licensed "as is" without any warranty of any kind, whether express 9*4882a593Smuzhiyun * or implied. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef __ASM_ARCH_SERIAL_H 12*4882a593Smuzhiyun #define __ASM_ARCH_SERIAL_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/memory.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include <mach/hardware.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) 19*4882a593Smuzhiyun #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) 20*4882a593Smuzhiyun #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define DA8XX_UART0_BASE (IO_PHYS + 0x042000) 23*4882a593Smuzhiyun #define DA8XX_UART1_BASE (IO_PHYS + 0x10c000) 24*4882a593Smuzhiyun #define DA8XX_UART2_BASE (IO_PHYS + 0x10d000) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* DaVinci UART register offsets */ 27*4882a593Smuzhiyun #define UART_DAVINCI_PWREMU 0x0c 28*4882a593Smuzhiyun #define UART_DM646X_SCR 0x10 29*4882a593Smuzhiyun #define UART_DM646X_SCR_TX_WATERMARK 0x08 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 32*4882a593Smuzhiyun #include <linux/platform_device.h> 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun extern int davinci_serial_init(struct platform_device *); 35*4882a593Smuzhiyun #endif 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #endif /* __ASM_ARCH_SERIAL_H */ 38