1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Lyrtech SFFSDR board support.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
6*4882a593Smuzhiyun * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on DV-EVM platform, original copyright follows:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2007 MontaVista Software, Inc.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/property.h>
17*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
18*4882a593Smuzhiyun #include <linux/mtd/rawnand.h>
19*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/mach-types.h>
22*4882a593Smuzhiyun #include <asm/mach/arch.h>
23*4882a593Smuzhiyun #include <asm/mach/flash.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <mach/common.h>
26*4882a593Smuzhiyun #include <linux/platform_data/i2c-davinci.h>
27*4882a593Smuzhiyun #include <mach/serial.h>
28*4882a593Smuzhiyun #include <mach/mux.h>
29*4882a593Smuzhiyun #include <linux/platform_data/usb-davinci.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "davinci.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define SFFSDR_PHY_ID "davinci_mdio-0:01"
34*4882a593Smuzhiyun static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
35*4882a593Smuzhiyun /* U-Boot Environment: Block 0
36*4882a593Smuzhiyun * UBL: Block 1
37*4882a593Smuzhiyun * U-Boot: Blocks 6-7 (256 kb)
38*4882a593Smuzhiyun * Integrity Kernel: Blocks 8-31 (3 Mb)
39*4882a593Smuzhiyun * Integrity Data: Blocks 100-END
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun .name = "Linux Kernel",
43*4882a593Smuzhiyun .offset = 32 * SZ_128K,
44*4882a593Smuzhiyun .size = 16 * SZ_128K, /* 2 Mb */
45*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE, /* Force read-only */
46*4882a593Smuzhiyun },
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun .name = "Linux ROOT",
49*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
50*4882a593Smuzhiyun .size = 256 * SZ_128K, /* 32 Mb */
51*4882a593Smuzhiyun .mask_flags = 0, /* R/W */
52*4882a593Smuzhiyun },
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static struct flash_platform_data davinci_sffsdr_nandflash_data = {
56*4882a593Smuzhiyun .parts = davinci_sffsdr_nandflash_partition,
57*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static struct resource davinci_sffsdr_nandflash_resource[] = {
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
63*4882a593Smuzhiyun .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
64*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
65*4882a593Smuzhiyun }, {
66*4882a593Smuzhiyun .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
67*4882a593Smuzhiyun .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
68*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
69*4882a593Smuzhiyun },
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct platform_device davinci_sffsdr_nandflash_device = {
73*4882a593Smuzhiyun .name = "davinci_nand", /* Name of driver */
74*4882a593Smuzhiyun .id = 0,
75*4882a593Smuzhiyun .dev = {
76*4882a593Smuzhiyun .platform_data = &davinci_sffsdr_nandflash_data,
77*4882a593Smuzhiyun },
78*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
79*4882a593Smuzhiyun .resource = davinci_sffsdr_nandflash_resource,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const struct property_entry eeprom_properties[] = {
83*4882a593Smuzhiyun PROPERTY_ENTRY_U32("pagesize", 32),
84*4882a593Smuzhiyun { }
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static struct i2c_board_info __initdata i2c_info[] = {
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun I2C_BOARD_INFO("24c64", 0x50),
90*4882a593Smuzhiyun .properties = eeprom_properties,
91*4882a593Smuzhiyun },
92*4882a593Smuzhiyun /* Other I2C devices:
93*4882a593Smuzhiyun * MSP430, addr 0x23 (not used)
94*4882a593Smuzhiyun * PCA9543, addr 0x70 (setup done by U-Boot)
95*4882a593Smuzhiyun * ADS7828, addr 0x48 (ADC for voltage monitoring.)
96*4882a593Smuzhiyun */
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static struct davinci_i2c_platform_data i2c_pdata = {
100*4882a593Smuzhiyun .bus_freq = 20 /* kHz */,
101*4882a593Smuzhiyun .bus_delay = 100 /* usec */,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
sffsdr_init_i2c(void)104*4882a593Smuzhiyun static void __init sffsdr_init_i2c(void)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun davinci_init_i2c(&i2c_pdata);
107*4882a593Smuzhiyun i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static struct platform_device *davinci_sffsdr_devices[] __initdata = {
111*4882a593Smuzhiyun &davinci_sffsdr_nandflash_device,
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
davinci_sffsdr_map_io(void)114*4882a593Smuzhiyun static void __init davinci_sffsdr_map_io(void)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun dm644x_init();
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
davinci_sffsdr_init(void)119*4882a593Smuzhiyun static __init void davinci_sffsdr_init(void)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct davinci_soc_info *soc_info = &davinci_soc_info;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun dm644x_register_clocks();
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun dm644x_init_devices();
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun platform_add_devices(davinci_sffsdr_devices,
128*4882a593Smuzhiyun ARRAY_SIZE(davinci_sffsdr_devices));
129*4882a593Smuzhiyun sffsdr_init_i2c();
130*4882a593Smuzhiyun davinci_serial_init(dm644x_serial_device);
131*4882a593Smuzhiyun soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
132*4882a593Smuzhiyun davinci_setup_usb(0, 0); /* We support only peripheral mode. */
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* mux VLYNQ pins */
135*4882a593Smuzhiyun davinci_cfg_reg(DM644X_VLYNQEN);
136*4882a593Smuzhiyun davinci_cfg_reg(DM644X_VLYNQWD);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
140*4882a593Smuzhiyun .atag_offset = 0x100,
141*4882a593Smuzhiyun .map_io = davinci_sffsdr_map_io,
142*4882a593Smuzhiyun .init_irq = dm644x_init_irq,
143*4882a593Smuzhiyun .init_time = dm644x_init_time,
144*4882a593Smuzhiyun .init_machine = davinci_sffsdr_init,
145*4882a593Smuzhiyun .init_late = davinci_init_late,
146*4882a593Smuzhiyun .dma_zone_size = SZ_128M,
147*4882a593Smuzhiyun MACHINE_END
148