1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Hawkboard.org based on TI's OMAP-L138 Platform
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Initial code: Syed Mohammed Khasim
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
9*4882a593Smuzhiyun * version 2. This program is licensed "as is" without any warranty of
10*4882a593Smuzhiyun * any kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/console.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/gpio.h>
17*4882a593Smuzhiyun #include <linux/gpio/machine.h>
18*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
19*4882a593Smuzhiyun #include <linux/mtd/rawnand.h>
20*4882a593Smuzhiyun #include <linux/platform_data/gpio-davinci.h>
21*4882a593Smuzhiyun #include <linux/platform_data/mtd-davinci.h>
22*4882a593Smuzhiyun #include <linux/platform_data/mtd-davinci-aemif.h>
23*4882a593Smuzhiyun #include <linux/platform_data/ti-aemif.h>
24*4882a593Smuzhiyun #include <linux/regulator/fixed.h>
25*4882a593Smuzhiyun #include <linux/regulator/machine.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include <asm/mach-types.h>
28*4882a593Smuzhiyun #include <asm/mach/arch.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <mach/common.h>
31*4882a593Smuzhiyun #include <mach/da8xx.h>
32*4882a593Smuzhiyun #include <mach/mux.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
37*4882a593Smuzhiyun #define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static short omapl138_hawk_mii_pins[] __initdata = {
40*4882a593Smuzhiyun DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
41*4882a593Smuzhiyun DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
42*4882a593Smuzhiyun DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
43*4882a593Smuzhiyun DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
44*4882a593Smuzhiyun DA850_MDIO_D,
45*4882a593Smuzhiyun -1
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
omapl138_hawk_config_emac(void)48*4882a593Smuzhiyun static __init void omapl138_hawk_config_emac(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
51*4882a593Smuzhiyun int ret;
52*4882a593Smuzhiyun u32 val;
53*4882a593Smuzhiyun struct davinci_soc_info *soc_info = &davinci_soc_info;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun val = __raw_readl(cfgchip3);
56*4882a593Smuzhiyun val &= ~BIT(8);
57*4882a593Smuzhiyun ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
58*4882a593Smuzhiyun if (ret) {
59*4882a593Smuzhiyun pr_warn("%s: CPGMAC/MII mux setup failed: %d\n", __func__, ret);
60*4882a593Smuzhiyun return;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* configure the CFGCHIP3 register for MII */
64*4882a593Smuzhiyun __raw_writel(val, cfgchip3);
65*4882a593Smuzhiyun pr_info("EMAC: MII PHY configured\n");
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun ret = da8xx_register_emac();
70*4882a593Smuzhiyun if (ret)
71*4882a593Smuzhiyun pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /*
75*4882a593Smuzhiyun * The following EDMA channels/slots are not being used by drivers (for
76*4882a593Smuzhiyun * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
77*4882a593Smuzhiyun * hence they are being reserved for codecs on the DSP side.
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun static const s16 da850_dma0_rsv_chans[][2] = {
80*4882a593Smuzhiyun /* (offset, number) */
81*4882a593Smuzhiyun { 8, 6},
82*4882a593Smuzhiyun {24, 4},
83*4882a593Smuzhiyun {30, 2},
84*4882a593Smuzhiyun {-1, -1}
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static const s16 da850_dma0_rsv_slots[][2] = {
88*4882a593Smuzhiyun /* (offset, number) */
89*4882a593Smuzhiyun { 8, 6},
90*4882a593Smuzhiyun {24, 4},
91*4882a593Smuzhiyun {30, 50},
92*4882a593Smuzhiyun {-1, -1}
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const s16 da850_dma1_rsv_chans[][2] = {
96*4882a593Smuzhiyun /* (offset, number) */
97*4882a593Smuzhiyun { 0, 28},
98*4882a593Smuzhiyun {30, 2},
99*4882a593Smuzhiyun {-1, -1}
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const s16 da850_dma1_rsv_slots[][2] = {
103*4882a593Smuzhiyun /* (offset, number) */
104*4882a593Smuzhiyun { 0, 28},
105*4882a593Smuzhiyun {30, 90},
106*4882a593Smuzhiyun {-1, -1}
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun static struct edma_rsv_info da850_edma_cc0_rsv = {
110*4882a593Smuzhiyun .rsv_chans = da850_dma0_rsv_chans,
111*4882a593Smuzhiyun .rsv_slots = da850_dma0_rsv_slots,
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static struct edma_rsv_info da850_edma_cc1_rsv = {
115*4882a593Smuzhiyun .rsv_chans = da850_dma1_rsv_chans,
116*4882a593Smuzhiyun .rsv_slots = da850_dma1_rsv_slots,
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun static struct edma_rsv_info *da850_edma_rsv[2] = {
120*4882a593Smuzhiyun &da850_edma_cc0_rsv,
121*4882a593Smuzhiyun &da850_edma_cc1_rsv,
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static const short hawk_mmcsd0_pins[] = {
125*4882a593Smuzhiyun DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
126*4882a593Smuzhiyun DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
127*4882a593Smuzhiyun DA850_GPIO3_12, DA850_GPIO3_13,
128*4882a593Smuzhiyun -1
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
132*4882a593Smuzhiyun #define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static struct gpiod_lookup_table mmc_gpios_table = {
135*4882a593Smuzhiyun .dev_id = "da830-mmc.0",
136*4882a593Smuzhiyun .table = {
137*4882a593Smuzhiyun GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_CD_PIN, "cd",
138*4882a593Smuzhiyun GPIO_ACTIVE_LOW),
139*4882a593Smuzhiyun GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_WP_PIN, "wp",
140*4882a593Smuzhiyun GPIO_ACTIVE_LOW),
141*4882a593Smuzhiyun },
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static struct davinci_mmc_config da850_mmc_config = {
145*4882a593Smuzhiyun .wires = 4,
146*4882a593Smuzhiyun .max_freq = 50000000,
147*4882a593Smuzhiyun .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
omapl138_hawk_mmc_init(void)150*4882a593Smuzhiyun static __init void omapl138_hawk_mmc_init(void)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun int ret;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
155*4882a593Smuzhiyun if (ret) {
156*4882a593Smuzhiyun pr_warn("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret);
157*4882a593Smuzhiyun return;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun gpiod_add_lookup_table(&mmc_gpios_table);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun ret = da8xx_register_mmcsd0(&da850_mmc_config);
163*4882a593Smuzhiyun if (ret) {
164*4882a593Smuzhiyun pr_warn("%s: MMC/SD0 registration failed: %d\n", __func__, ret);
165*4882a593Smuzhiyun goto mmc_setup_mmcsd_fail;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun mmc_setup_mmcsd_fail:
171*4882a593Smuzhiyun gpiod_remove_lookup_table(&mmc_gpios_table);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun static struct mtd_partition omapl138_hawk_nandflash_partition[] = {
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun .name = "u-boot env",
177*4882a593Smuzhiyun .offset = 0,
178*4882a593Smuzhiyun .size = SZ_128K,
179*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
180*4882a593Smuzhiyun },
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun .name = "u-boot",
183*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
184*4882a593Smuzhiyun .size = SZ_512K,
185*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
186*4882a593Smuzhiyun },
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun .name = "free space",
189*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
190*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
191*4882a593Smuzhiyun .mask_flags = 0,
192*4882a593Smuzhiyun },
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = {
196*4882a593Smuzhiyun .wsetup = 24,
197*4882a593Smuzhiyun .wstrobe = 21,
198*4882a593Smuzhiyun .whold = 14,
199*4882a593Smuzhiyun .rsetup = 19,
200*4882a593Smuzhiyun .rstrobe = 50,
201*4882a593Smuzhiyun .rhold = 0,
202*4882a593Smuzhiyun .ta = 20,
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
206*4882a593Smuzhiyun .core_chipsel = 1,
207*4882a593Smuzhiyun .parts = omapl138_hawk_nandflash_partition,
208*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
209*4882a593Smuzhiyun .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
210*4882a593Smuzhiyun .ecc_bits = 4,
211*4882a593Smuzhiyun .bbt_options = NAND_BBT_USE_FLASH,
212*4882a593Smuzhiyun .options = NAND_BUSWIDTH_16,
213*4882a593Smuzhiyun .timing = &omapl138_hawk_nandflash_timing,
214*4882a593Smuzhiyun .mask_chipsel = 0,
215*4882a593Smuzhiyun .mask_ale = 0,
216*4882a593Smuzhiyun .mask_cle = 0,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun static struct resource omapl138_hawk_nandflash_resource[] = {
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun .start = DA8XX_AEMIF_CS3_BASE,
222*4882a593Smuzhiyun .end = DA8XX_AEMIF_CS3_BASE + SZ_32M,
223*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
224*4882a593Smuzhiyun },
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun .start = DA8XX_AEMIF_CTL_BASE,
227*4882a593Smuzhiyun .end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
228*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
229*4882a593Smuzhiyun },
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static struct resource omapl138_hawk_aemif_resource[] = {
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun .start = DA8XX_AEMIF_CTL_BASE,
235*4882a593Smuzhiyun .end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
236*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun };
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = {
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun .cs = 3,
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun static struct platform_device omapl138_hawk_aemif_devices[] = {
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun .name = "davinci_nand",
249*4882a593Smuzhiyun .id = -1,
250*4882a593Smuzhiyun .dev = {
251*4882a593Smuzhiyun .platform_data = &omapl138_hawk_nandflash_data,
252*4882a593Smuzhiyun },
253*4882a593Smuzhiyun .resource = omapl138_hawk_nandflash_resource,
254*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource),
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static struct aemif_platform_data omapl138_hawk_aemif_pdata = {
259*4882a593Smuzhiyun .cs_offset = 2,
260*4882a593Smuzhiyun .abus_data = omapl138_hawk_aemif_abus_data,
261*4882a593Smuzhiyun .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data),
262*4882a593Smuzhiyun .sub_devices = omapl138_hawk_aemif_devices,
263*4882a593Smuzhiyun .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices),
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun static struct platform_device omapl138_hawk_aemif_device = {
267*4882a593Smuzhiyun .name = "ti-aemif",
268*4882a593Smuzhiyun .id = -1,
269*4882a593Smuzhiyun .dev = {
270*4882a593Smuzhiyun .platform_data = &omapl138_hawk_aemif_pdata,
271*4882a593Smuzhiyun },
272*4882a593Smuzhiyun .resource = omapl138_hawk_aemif_resource,
273*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource),
274*4882a593Smuzhiyun };
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static const short omapl138_hawk_nand_pins[] = {
277*4882a593Smuzhiyun DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3,
278*4882a593Smuzhiyun DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
279*4882a593Smuzhiyun DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
280*4882a593Smuzhiyun DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
281*4882a593Smuzhiyun DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
282*4882a593Smuzhiyun DA850_EMA_A_1, DA850_EMA_A_2,
283*4882a593Smuzhiyun -1
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun
omapl138_hawk_register_aemif(void)286*4882a593Smuzhiyun static int omapl138_hawk_register_aemif(void)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun int ret;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins);
291*4882a593Smuzhiyun if (ret)
292*4882a593Smuzhiyun pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return platform_device_register(&omapl138_hawk_aemif_device);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun static const short da850_hawk_usb11_pins[] = {
298*4882a593Smuzhiyun DA850_GPIO2_4, DA850_GPIO6_13,
299*4882a593Smuzhiyun -1
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun static struct regulator_consumer_supply hawk_usb_supplies[] = {
303*4882a593Smuzhiyun REGULATOR_SUPPLY("vbus", NULL),
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun static struct regulator_init_data hawk_usb_vbus_data = {
307*4882a593Smuzhiyun .consumer_supplies = hawk_usb_supplies,
308*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(hawk_usb_supplies),
309*4882a593Smuzhiyun .constraints = {
310*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
311*4882a593Smuzhiyun },
312*4882a593Smuzhiyun };
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun static struct fixed_voltage_config hawk_usb_vbus = {
315*4882a593Smuzhiyun .supply_name = "vbus",
316*4882a593Smuzhiyun .microvolts = 3300000,
317*4882a593Smuzhiyun .init_data = &hawk_usb_vbus_data,
318*4882a593Smuzhiyun };
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun static struct platform_device hawk_usb_vbus_device = {
321*4882a593Smuzhiyun .name = "reg-fixed-voltage",
322*4882a593Smuzhiyun .id = 0,
323*4882a593Smuzhiyun .dev = {
324*4882a593Smuzhiyun .platform_data = &hawk_usb_vbus,
325*4882a593Smuzhiyun },
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun static struct gpiod_lookup_table hawk_usb_oc_gpio_lookup = {
329*4882a593Smuzhiyun .dev_id = "ohci-da8xx",
330*4882a593Smuzhiyun .table = {
331*4882a593Smuzhiyun GPIO_LOOKUP("davinci_gpio", DA850_USB1_OC_PIN, "oc", 0),
332*4882a593Smuzhiyun { }
333*4882a593Smuzhiyun },
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun static struct gpiod_lookup_table hawk_usb_vbus_gpio_lookup = {
337*4882a593Smuzhiyun .dev_id = "reg-fixed-voltage.0",
338*4882a593Smuzhiyun .table = {
339*4882a593Smuzhiyun GPIO_LOOKUP("davinci_gpio", DA850_USB1_VBUS_PIN, NULL, 0),
340*4882a593Smuzhiyun { }
341*4882a593Smuzhiyun },
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static struct gpiod_lookup_table *hawk_usb_gpio_lookups[] = {
345*4882a593Smuzhiyun &hawk_usb_oc_gpio_lookup,
346*4882a593Smuzhiyun &hawk_usb_vbus_gpio_lookup,
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
350*4882a593Smuzhiyun /* TPS2087 switch @ 5V */
351*4882a593Smuzhiyun .potpgt = (3 + 1) / 2, /* 3 ms max */
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
omapl138_hawk_usb_init(void)354*4882a593Smuzhiyun static __init void omapl138_hawk_usb_init(void)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun int ret;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
359*4882a593Smuzhiyun if (ret) {
360*4882a593Smuzhiyun pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
361*4882a593Smuzhiyun return;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun ret = da8xx_register_usb_phy_clocks();
365*4882a593Smuzhiyun if (ret)
366*4882a593Smuzhiyun pr_warn("%s: USB PHY CLK registration failed: %d\n",
367*4882a593Smuzhiyun __func__, ret);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun gpiod_add_lookup_tables(hawk_usb_gpio_lookups,
370*4882a593Smuzhiyun ARRAY_SIZE(hawk_usb_gpio_lookups));
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun ret = da8xx_register_usb_phy();
373*4882a593Smuzhiyun if (ret)
374*4882a593Smuzhiyun pr_warn("%s: USB PHY registration failed: %d\n",
375*4882a593Smuzhiyun __func__, ret);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun ret = platform_device_register(&hawk_usb_vbus_device);
378*4882a593Smuzhiyun if (ret) {
379*4882a593Smuzhiyun pr_warn("%s: Unable to register the vbus supply\n", __func__);
380*4882a593Smuzhiyun return;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
384*4882a593Smuzhiyun if (ret)
385*4882a593Smuzhiyun pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun return;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
omapl138_hawk_init(void)390*4882a593Smuzhiyun static __init void omapl138_hawk_init(void)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun int ret;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun da850_register_clocks();
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun ret = da850_register_gpio();
397*4882a593Smuzhiyun if (ret)
398*4882a593Smuzhiyun pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun davinci_serial_init(da8xx_serial_device);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun omapl138_hawk_config_emac();
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun ret = da850_register_edma(da850_edma_rsv);
405*4882a593Smuzhiyun if (ret)
406*4882a593Smuzhiyun pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun omapl138_hawk_mmc_init();
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun omapl138_hawk_usb_init();
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun ret = omapl138_hawk_register_aemif();
413*4882a593Smuzhiyun if (ret)
414*4882a593Smuzhiyun pr_warn("%s: aemif registration failed: %d\n", __func__, ret);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun ret = da8xx_register_watchdog();
417*4882a593Smuzhiyun if (ret)
418*4882a593Smuzhiyun pr_warn("%s: watchdog registration failed: %d\n",
419*4882a593Smuzhiyun __func__, ret);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun ret = da8xx_register_rproc();
422*4882a593Smuzhiyun if (ret)
423*4882a593Smuzhiyun pr_warn("%s: dsp/rproc registration failed: %d\n",
424*4882a593Smuzhiyun __func__, ret);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun regulator_has_full_constraints();
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_CONSOLE
omapl138_hawk_console_init(void)430*4882a593Smuzhiyun static int __init omapl138_hawk_console_init(void)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun if (!machine_is_omapl138_hawkboard())
433*4882a593Smuzhiyun return 0;
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun return add_preferred_console("ttyS", 2, "115200");
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun console_initcall(omapl138_hawk_console_init);
438*4882a593Smuzhiyun #endif
439*4882a593Smuzhiyun
omapl138_hawk_map_io(void)440*4882a593Smuzhiyun static void __init omapl138_hawk_map_io(void)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun da850_init();
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
446*4882a593Smuzhiyun .atag_offset = 0x100,
447*4882a593Smuzhiyun .map_io = omapl138_hawk_map_io,
448*4882a593Smuzhiyun .init_irq = da850_init_irq,
449*4882a593Smuzhiyun .init_time = da850_init_time,
450*4882a593Smuzhiyun .init_machine = omapl138_hawk_init,
451*4882a593Smuzhiyun .init_late = davinci_init_late,
452*4882a593Smuzhiyun .dma_zone_size = SZ_128M,
453*4882a593Smuzhiyun .reserve = da8xx_rproc_reserve_cma,
454*4882a593Smuzhiyun MACHINE_END
455