1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * linux/arch/arm/lib/delay.S 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1995, 1996 Russell King 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun#include <linux/linkage.h> 8*4882a593Smuzhiyun#include <asm/assembler.h> 9*4882a593Smuzhiyun#include <asm/delay.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun .text 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun.LC0: .word loops_per_jiffy 14*4882a593Smuzhiyun.LC1: .word UDELAY_MULT 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/* 17*4882a593Smuzhiyun * loops = r0 * HZ * loops_per_jiffy / 1000000 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * r0 <= 2000 20*4882a593Smuzhiyun * HZ <= 1000 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunENTRY(__loop_udelay) 24*4882a593Smuzhiyun ldr r2, .LC1 25*4882a593Smuzhiyun mul r0, r2, r0 @ r0 = delay_us * UDELAY_MULT 26*4882a593SmuzhiyunENTRY(__loop_const_udelay) @ 0 <= r0 <= 0xfffffaf0 27*4882a593Smuzhiyun ldr r2, .LC0 28*4882a593Smuzhiyun ldr r2, [r2] 29*4882a593Smuzhiyun umull r1, r0, r2, r0 @ r0-r1 = r0 * loops_per_jiffy 30*4882a593Smuzhiyun adds r1, r1, #0xffffffff @ rounding up ... 31*4882a593Smuzhiyun adcs r0, r0, r0 @ and right shift by 31 32*4882a593Smuzhiyun reteq lr 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun .align 3 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun@ Delay routine 37*4882a593SmuzhiyunENTRY(__loop_delay) 38*4882a593Smuzhiyun subs r0, r0, #1 39*4882a593Smuzhiyun#if 0 40*4882a593Smuzhiyun retls lr 41*4882a593Smuzhiyun subs r0, r0, #1 42*4882a593Smuzhiyun retls lr 43*4882a593Smuzhiyun subs r0, r0, #1 44*4882a593Smuzhiyun retls lr 45*4882a593Smuzhiyun subs r0, r0, #1 46*4882a593Smuzhiyun retls lr 47*4882a593Smuzhiyun subs r0, r0, #1 48*4882a593Smuzhiyun retls lr 49*4882a593Smuzhiyun subs r0, r0, #1 50*4882a593Smuzhiyun retls lr 51*4882a593Smuzhiyun subs r0, r0, #1 52*4882a593Smuzhiyun retls lr 53*4882a593Smuzhiyun subs r0, r0, #1 54*4882a593Smuzhiyun#endif 55*4882a593Smuzhiyun bhi __loop_delay 56*4882a593Smuzhiyun ret lr 57*4882a593SmuzhiyunENDPROC(__loop_udelay) 58*4882a593SmuzhiyunENDPROC(__loop_const_udelay) 59*4882a593SmuzhiyunENDPROC(__loop_delay) 60