1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/include/asm/ptrace.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1996-2003 Russell King 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 8*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 9*4882a593Smuzhiyun * published by the Free Software Foundation. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef _UAPI__ASM_ARM_PTRACE_H 12*4882a593Smuzhiyun #define _UAPI__ASM_ARM_PTRACE_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/hwcap.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define PTRACE_GETREGS 12 17*4882a593Smuzhiyun #define PTRACE_SETREGS 13 18*4882a593Smuzhiyun #define PTRACE_GETFPREGS 14 19*4882a593Smuzhiyun #define PTRACE_SETFPREGS 15 20*4882a593Smuzhiyun /* PTRACE_ATTACH is 16 */ 21*4882a593Smuzhiyun /* PTRACE_DETACH is 17 */ 22*4882a593Smuzhiyun #define PTRACE_GETWMMXREGS 18 23*4882a593Smuzhiyun #define PTRACE_SETWMMXREGS 19 24*4882a593Smuzhiyun /* 20 is unused */ 25*4882a593Smuzhiyun #define PTRACE_OLDSETOPTIONS 21 26*4882a593Smuzhiyun #define PTRACE_GET_THREAD_AREA 22 27*4882a593Smuzhiyun #define PTRACE_SET_SYSCALL 23 28*4882a593Smuzhiyun /* PTRACE_SYSCALL is 24 */ 29*4882a593Smuzhiyun #define PTRACE_GETCRUNCHREGS 25 30*4882a593Smuzhiyun #define PTRACE_SETCRUNCHREGS 26 31*4882a593Smuzhiyun #define PTRACE_GETVFPREGS 27 32*4882a593Smuzhiyun #define PTRACE_SETVFPREGS 28 33*4882a593Smuzhiyun #define PTRACE_GETHBPREGS 29 34*4882a593Smuzhiyun #define PTRACE_SETHBPREGS 30 35*4882a593Smuzhiyun #define PTRACE_GETFDPIC 31 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define PTRACE_GETFDPIC_EXEC 0 38*4882a593Smuzhiyun #define PTRACE_GETFDPIC_INTERP 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* 41*4882a593Smuzhiyun * PSR bits 42*4882a593Smuzhiyun * Note on V7M there is no mode contained in the PSR 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun #define USR26_MODE 0x00000000 45*4882a593Smuzhiyun #define FIQ26_MODE 0x00000001 46*4882a593Smuzhiyun #define IRQ26_MODE 0x00000002 47*4882a593Smuzhiyun #define SVC26_MODE 0x00000003 48*4882a593Smuzhiyun #if defined(__KERNEL__) && defined(CONFIG_CPU_V7M) 49*4882a593Smuzhiyun /* 50*4882a593Smuzhiyun * Use 0 here to get code right that creates a userspace 51*4882a593Smuzhiyun * or kernel space thread. 52*4882a593Smuzhiyun */ 53*4882a593Smuzhiyun #define USR_MODE 0x00000000 54*4882a593Smuzhiyun #define SVC_MODE 0x00000000 55*4882a593Smuzhiyun #else 56*4882a593Smuzhiyun #define USR_MODE 0x00000010 57*4882a593Smuzhiyun #define SVC_MODE 0x00000013 58*4882a593Smuzhiyun #endif 59*4882a593Smuzhiyun #define FIQ_MODE 0x00000011 60*4882a593Smuzhiyun #define IRQ_MODE 0x00000012 61*4882a593Smuzhiyun #define MON_MODE 0x00000016 62*4882a593Smuzhiyun #define ABT_MODE 0x00000017 63*4882a593Smuzhiyun #define HYP_MODE 0x0000001a 64*4882a593Smuzhiyun #define UND_MODE 0x0000001b 65*4882a593Smuzhiyun #define SYSTEM_MODE 0x0000001f 66*4882a593Smuzhiyun #define MODE32_BIT 0x00000010 67*4882a593Smuzhiyun #define MODE_MASK 0x0000001f 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */ 70*4882a593Smuzhiyun #define V7M_PSR_T_BIT 0x01000000 71*4882a593Smuzhiyun #if defined(__KERNEL__) && defined(CONFIG_CPU_V7M) 72*4882a593Smuzhiyun #define PSR_T_BIT V7M_PSR_T_BIT 73*4882a593Smuzhiyun #else 74*4882a593Smuzhiyun /* for compatibility */ 75*4882a593Smuzhiyun #define PSR_T_BIT V4_PSR_T_BIT 76*4882a593Smuzhiyun #endif 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */ 79*4882a593Smuzhiyun #define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */ 80*4882a593Smuzhiyun #define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */ 81*4882a593Smuzhiyun #define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */ 82*4882a593Smuzhiyun #define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */ 83*4882a593Smuzhiyun #define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */ 84*4882a593Smuzhiyun #define PSR_V_BIT 0x10000000 85*4882a593Smuzhiyun #define PSR_C_BIT 0x20000000 86*4882a593Smuzhiyun #define PSR_Z_BIT 0x40000000 87*4882a593Smuzhiyun #define PSR_N_BIT 0x80000000 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* 90*4882a593Smuzhiyun * Groups of PSR bits 91*4882a593Smuzhiyun */ 92*4882a593Smuzhiyun #define PSR_f 0xff000000 /* Flags */ 93*4882a593Smuzhiyun #define PSR_s 0x00ff0000 /* Status */ 94*4882a593Smuzhiyun #define PSR_x 0x0000ff00 /* Extension */ 95*4882a593Smuzhiyun #define PSR_c 0x000000ff /* Control */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * ARMv7 groups of PSR bits 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun #define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */ 101*4882a593Smuzhiyun #define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ 102*4882a593Smuzhiyun #define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 103*4882a593Smuzhiyun #define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* 106*4882a593Smuzhiyun * Default endianness state 107*4882a593Smuzhiyun */ 108*4882a593Smuzhiyun #ifdef CONFIG_CPU_ENDIAN_BE8 109*4882a593Smuzhiyun #define PSR_ENDSTATE PSR_E_BIT 110*4882a593Smuzhiyun #else 111*4882a593Smuzhiyun #define PSR_ENDSTATE 0 112*4882a593Smuzhiyun #endif 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* 115*4882a593Smuzhiyun * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 116*4882a593Smuzhiyun * process is located in memory. 117*4882a593Smuzhiyun */ 118*4882a593Smuzhiyun #define PT_TEXT_ADDR 0x10000 119*4882a593Smuzhiyun #define PT_DATA_ADDR 0x10004 120*4882a593Smuzhiyun #define PT_TEXT_END_ADDR 0x10008 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun /* 125*4882a593Smuzhiyun * This struct defines the way the registers are stored on the 126*4882a593Smuzhiyun * stack during a system call. Note that sizeof(struct pt_regs) 127*4882a593Smuzhiyun * has to be a multiple of 8. 128*4882a593Smuzhiyun */ 129*4882a593Smuzhiyun #ifndef __KERNEL__ 130*4882a593Smuzhiyun struct pt_regs { 131*4882a593Smuzhiyun long uregs[18]; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun #endif /* __KERNEL__ */ 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun #define ARM_cpsr uregs[16] 136*4882a593Smuzhiyun #define ARM_pc uregs[15] 137*4882a593Smuzhiyun #define ARM_lr uregs[14] 138*4882a593Smuzhiyun #define ARM_sp uregs[13] 139*4882a593Smuzhiyun #define ARM_ip uregs[12] 140*4882a593Smuzhiyun #define ARM_fp uregs[11] 141*4882a593Smuzhiyun #define ARM_r10 uregs[10] 142*4882a593Smuzhiyun #define ARM_r9 uregs[9] 143*4882a593Smuzhiyun #define ARM_r8 uregs[8] 144*4882a593Smuzhiyun #define ARM_r7 uregs[7] 145*4882a593Smuzhiyun #define ARM_r6 uregs[6] 146*4882a593Smuzhiyun #define ARM_r5 uregs[5] 147*4882a593Smuzhiyun #define ARM_r4 uregs[4] 148*4882a593Smuzhiyun #define ARM_r3 uregs[3] 149*4882a593Smuzhiyun #define ARM_r2 uregs[2] 150*4882a593Smuzhiyun #define ARM_r1 uregs[1] 151*4882a593Smuzhiyun #define ARM_r0 uregs[0] 152*4882a593Smuzhiyun #define ARM_ORIG_r0 uregs[17] 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun /* 155*4882a593Smuzhiyun * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS 156*4882a593Smuzhiyun * and core dumps. 157*4882a593Smuzhiyun */ 158*4882a593Smuzhiyun #define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ ) 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #endif /* _UAPI__ASM_ARM_PTRACE_H */ 164