1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Debugging macro include header 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1994-1999 Russell King 6*4882a593Smuzhiyun * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7*4882a593Smuzhiyun*/ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include <linux/serial_reg.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/* External port on Zoom2/3 */ 12*4882a593Smuzhiyun#define ZOOM_UART_BASE 0x10000000 13*4882a593Smuzhiyun#define ZOOM_UART_VIRT 0xfa400000 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun#define OMAP_PORT_SHIFT 2 16*4882a593Smuzhiyun#define ZOOM_PORT_SHIFT 1 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun#define UART_OFFSET(addr) ((addr) & 0x00ffffff) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun .pushsection .data 21*4882a593Smuzhiyun .align 2 22*4882a593Smuzhiyunomap_uart_phys: .word 0 23*4882a593Smuzhiyunomap_uart_virt: .word 0 24*4882a593Smuzhiyunomap_uart_lsr: .word 0 25*4882a593Smuzhiyun .popsection 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun .macro addruart, rp, rv, tmp 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* Use omap_uart_phys/virt if already configured */ 30*4882a593Smuzhiyun10: adr \rp, 99f @ get effective addr of 99f 31*4882a593Smuzhiyun ldr \rv, [\rp] @ get absolute addr of 99f 32*4882a593Smuzhiyun sub \rv, \rv, \rp @ offset between the two 33*4882a593Smuzhiyun ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 34*4882a593Smuzhiyun sub \tmp, \rp, \rv @ make it effective 35*4882a593Smuzhiyun ldr \rp, [\tmp, #0] @ omap_uart_phys 36*4882a593Smuzhiyun ldr \rv, [\tmp, #4] @ omap_uart_virt 37*4882a593Smuzhiyun cmp \rp, #0 @ is port configured? 38*4882a593Smuzhiyun cmpne \rv, #0 39*4882a593Smuzhiyun bne 100f @ already configured 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* Configure the UART offset from the phys/virt base */ 42*4882a593Smuzhiyun#ifdef CONFIG_DEBUG_ZOOM_UART 43*4882a593Smuzhiyun ldr \rp, =ZOOM_UART_BASE 44*4882a593Smuzhiyun str \rp, [\tmp, #0] @ omap_uart_phys 45*4882a593Smuzhiyun ldr \rp, =ZOOM_UART_VIRT 46*4882a593Smuzhiyun str \rp, [\tmp, #4] @ omap_uart_virt 47*4882a593Smuzhiyun mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 48*4882a593Smuzhiyun str \rp, [\tmp, #8] @ omap_uart_lsr 49*4882a593Smuzhiyun#endif 50*4882a593Smuzhiyun b 10b 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun .align 53*4882a593Smuzhiyun99: .word . 54*4882a593Smuzhiyun .word omap_uart_phys 55*4882a593Smuzhiyun .ltorg 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun100: /* Pass the UART_LSR reg address */ 58*4882a593Smuzhiyun ldr \tmp, [\tmp, #8] @ omap_uart_lsr 59*4882a593Smuzhiyun add \rp, \rp, \tmp 60*4882a593Smuzhiyun add \rv, \rv, \tmp 61*4882a593Smuzhiyun .endm 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun .macro senduart,rd,rx 64*4882a593Smuzhiyun orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset 65*4882a593Smuzhiyun bic \rx, \rx, #0xff @ get base (THR) reg address 66*4882a593Smuzhiyun strb \rd, [\rx] @ send lower byte of rd 67*4882a593Smuzhiyun orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) 68*4882a593Smuzhiyun bic \rd, \rd, #(0xff << 24) @ restore original rd 69*4882a593Smuzhiyun .endm 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun .macro busyuart,rd,rx 72*4882a593Smuzhiyun1001: ldrb \rd, [\rx] @ rx contains UART_LSR address 73*4882a593Smuzhiyun and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 74*4882a593Smuzhiyun teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 75*4882a593Smuzhiyun bne 1001b 76*4882a593Smuzhiyun .endm 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun .macro waituartcts,rd,rx 79*4882a593Smuzhiyun .endm 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun .macro waituarttxrdy,rd,rx 82*4882a593Smuzhiyun .endm 83