1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#ifndef CONFIG_DEBUG_CLPS711X_UART2 7*4882a593Smuzhiyun#define CLPS711X_UART_PADDR (0x80000000 + 0x0000) 8*4882a593Smuzhiyun#define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000) 9*4882a593Smuzhiyun#else 10*4882a593Smuzhiyun#define CLPS711X_UART_PADDR (0x80000000 + 0x1000) 11*4882a593Smuzhiyun#define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000) 12*4882a593Smuzhiyun#endif 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#define SYSFLG (0x0140) 15*4882a593Smuzhiyun#define SYSFLG_UBUSY (1 << 11) 16*4882a593Smuzhiyun#define UARTDR (0x0480) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun .macro addruart, rp, rv, tmp 19*4882a593Smuzhiyun ldr \rv, =CLPS711X_UART_VADDR 20*4882a593Smuzhiyun ldr \rp, =CLPS711X_UART_PADDR 21*4882a593Smuzhiyun .endm 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun .macro waituartcts,rd,rx 24*4882a593Smuzhiyun .endm 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun .macro waituarttxrdy,rd,rx 27*4882a593Smuzhiyun .endm 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun .macro senduart,rd,rx 30*4882a593Smuzhiyun str \rd, [\rx, #UARTDR] 31*4882a593Smuzhiyun .endm 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun .macro busyuart,rd,rx 34*4882a593Smuzhiyun1001: ldr \rd, [\rx, #SYSFLG] 35*4882a593Smuzhiyun tst \rd, #SYSFLG_UBUSY 36*4882a593Smuzhiyun bne 1001b 37*4882a593Smuzhiyun .endm 38