1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/arm/include/asm/tlb.h
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2002 Russell King
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Experimentation shows that on a StrongARM, it appears to be faster
8*4882a593Smuzhiyun * to use the "invalidate whole tlb" rather than "invalidate single
9*4882a593Smuzhiyun * tlb" for this.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This appears true for both the process fork+exit case, as well as
12*4882a593Smuzhiyun * the munmap-large-area case.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #ifndef __ASMARM_TLB_H
15*4882a593Smuzhiyun #define __ASMARM_TLB_H
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/cacheflush.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #ifndef CONFIG_MMU
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/pagemap.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define tlb_flush(tlb) ((void) tlb)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <asm-generic/tlb.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #else /* !CONFIG_MMU */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <linux/swap.h>
30*4882a593Smuzhiyun #include <asm/tlbflush.h>
31*4882a593Smuzhiyun
__tlb_remove_table(void * _table)32*4882a593Smuzhiyun static inline void __tlb_remove_table(void *_table)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun free_page_and_swap_cache((struct page *)_table);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include <asm-generic/tlb.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static inline void
__pte_free_tlb(struct mmu_gather * tlb,pgtable_t pte,unsigned long addr)40*4882a593Smuzhiyun __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun pgtable_pte_page_dtor(pte);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #ifndef CONFIG_ARM_LPAE
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun * With the classic ARM MMU, a pte page has two corresponding pmd
47*4882a593Smuzhiyun * entries, each covering 1MB.
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun addr = (addr & PMD_MASK) + SZ_1M;
50*4882a593Smuzhiyun __tlb_adjust_range(tlb, addr - PAGE_SIZE, 2 * PAGE_SIZE);
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun tlb_remove_table(tlb, pte);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static inline void
__pmd_free_tlb(struct mmu_gather * tlb,pmd_t * pmdp,unsigned long addr)57*4882a593Smuzhiyun __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun #ifdef CONFIG_ARM_LPAE
60*4882a593Smuzhiyun struct page *page = virt_to_page(pmdp);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun pgtable_pmd_page_dtor(page);
63*4882a593Smuzhiyun tlb_remove_table(tlb, page);
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #endif /* CONFIG_MMU */
68*4882a593Smuzhiyun #endif
69