1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __ASMARM_ARCH_SCU_H
3*4882a593Smuzhiyun #define __ASMARM_ARCH_SCU_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #define SCU_PM_NORMAL 0
6*4882a593Smuzhiyun #define SCU_PM_DORMANT 2
7*4882a593Smuzhiyun #define SCU_PM_POWEROFF 3
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef __ASSEMBLER__
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <asm/cputype.h>
13*4882a593Smuzhiyun
scu_a9_has_base(void)14*4882a593Smuzhiyun static inline bool scu_a9_has_base(void)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
17*4882a593Smuzhiyun }
18*4882a593Smuzhiyun
scu_a9_get_base(void)19*4882a593Smuzhiyun static inline unsigned long scu_a9_get_base(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun unsigned long pa;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun return pa;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #ifdef CONFIG_HAVE_ARM_SCU
29*4882a593Smuzhiyun unsigned int scu_get_core_count(void __iomem *);
30*4882a593Smuzhiyun int scu_power_mode(void __iomem *, unsigned int);
31*4882a593Smuzhiyun int scu_cpu_power_enable(void __iomem *, unsigned int);
32*4882a593Smuzhiyun int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
33*4882a593Smuzhiyun #else
scu_get_core_count(void __iomem * scu_base)34*4882a593Smuzhiyun static inline unsigned int scu_get_core_count(void __iomem *scu_base)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
scu_power_mode(void __iomem * scu_base,unsigned int mode)38*4882a593Smuzhiyun static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return -EINVAL;
41*4882a593Smuzhiyun }
scu_cpu_power_enable(void __iomem * scu_base,unsigned int mode)42*4882a593Smuzhiyun static inline int scu_cpu_power_enable(void __iomem *scu_base,
43*4882a593Smuzhiyun unsigned int mode)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return -EINVAL;
46*4882a593Smuzhiyun }
scu_get_cpu_power_mode(void __iomem * scu_base,unsigned int logical_cpu)47*4882a593Smuzhiyun static inline int scu_get_cpu_power_mode(void __iomem *scu_base,
48*4882a593Smuzhiyun unsigned int logical_cpu)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return -EINVAL;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun #endif
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
55*4882a593Smuzhiyun void scu_enable(void __iomem *scu_base);
56*4882a593Smuzhiyun #else
scu_enable(void __iomem * scu_base)57*4882a593Smuzhiyun static inline void scu_enable(void __iomem *scu_base) {}
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #endif
63