1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/include/asm/hardware/memc.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) Russell King. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #define VDMA_ALIGNMENT PAGE_SIZE 8*4882a593Smuzhiyun #define VDMA_XFERSIZE 16 9*4882a593Smuzhiyun #define VDMA_INIT 0 10*4882a593Smuzhiyun #define VDMA_START 1 11*4882a593Smuzhiyun #define VDMA_END 2 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 14*4882a593Smuzhiyun extern void memc_write(unsigned int reg, unsigned long val); 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define video_set_dma(start,end,offset) \ 17*4882a593Smuzhiyun do { \ 18*4882a593Smuzhiyun memc_write (VDMA_START, (start >> 2)); \ 19*4882a593Smuzhiyun memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \ 20*4882a593Smuzhiyun memc_write (VDMA_INIT, (offset >> 2)); \ 21*4882a593Smuzhiyun } while (0) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif 24