1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __ASMARM_ARCH_TIMER_H
3*4882a593Smuzhiyun #define __ASMARM_ARCH_TIMER_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <asm/barrier.h>
6*4882a593Smuzhiyun #include <asm/errno.h>
7*4882a593Smuzhiyun #include <asm/hwcap.h>
8*4882a593Smuzhiyun #include <linux/clocksource.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <clocksource/arm_arch_timer.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #ifdef CONFIG_ARM_ARCH_TIMER
15*4882a593Smuzhiyun /* 32bit ARM doesn't know anything about timer errata... */
16*4882a593Smuzhiyun #define has_erratum_handler(h) (false)
17*4882a593Smuzhiyun #define erratum_handler(h) (arch_timer_##h)
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun int arch_timer_arch_init(void);
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun * These register accessors are marked inline so the compiler can
23*4882a593Smuzhiyun * nicely work out which register we want, and chuck away the rest of
24*4882a593Smuzhiyun * the code. At least it does so with a recent GCC (4.6.3).
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun static __always_inline
arch_timer_reg_write_cp15(int access,enum arch_timer_reg reg,u32 val)27*4882a593Smuzhiyun void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun if (access == ARCH_TIMER_PHYS_ACCESS) {
30*4882a593Smuzhiyun switch (reg) {
31*4882a593Smuzhiyun case ARCH_TIMER_REG_CTRL:
32*4882a593Smuzhiyun asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val));
33*4882a593Smuzhiyun break;
34*4882a593Smuzhiyun case ARCH_TIMER_REG_TVAL:
35*4882a593Smuzhiyun asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));
36*4882a593Smuzhiyun break;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun } else if (access == ARCH_TIMER_VIRT_ACCESS) {
39*4882a593Smuzhiyun switch (reg) {
40*4882a593Smuzhiyun case ARCH_TIMER_REG_CTRL:
41*4882a593Smuzhiyun asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val));
42*4882a593Smuzhiyun break;
43*4882a593Smuzhiyun case ARCH_TIMER_REG_TVAL:
44*4882a593Smuzhiyun asm volatile("mcr p15, 0, %0, c14, c3, 0" : : "r" (val));
45*4882a593Smuzhiyun break;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun isb();
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static __always_inline
arch_timer_reg_read_cp15(int access,enum arch_timer_reg reg)53*4882a593Smuzhiyun u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun u32 val = 0;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (access == ARCH_TIMER_PHYS_ACCESS) {
58*4882a593Smuzhiyun switch (reg) {
59*4882a593Smuzhiyun case ARCH_TIMER_REG_CTRL:
60*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val));
61*4882a593Smuzhiyun break;
62*4882a593Smuzhiyun case ARCH_TIMER_REG_TVAL:
63*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
64*4882a593Smuzhiyun break;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun } else if (access == ARCH_TIMER_VIRT_ACCESS) {
67*4882a593Smuzhiyun switch (reg) {
68*4882a593Smuzhiyun case ARCH_TIMER_REG_CTRL:
69*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val));
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun case ARCH_TIMER_REG_TVAL:
72*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c3, 0" : "=r" (val));
73*4882a593Smuzhiyun break;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return val;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
arch_timer_get_cntfrq(void)80*4882a593Smuzhiyun static inline u32 arch_timer_get_cntfrq(void)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun u32 val;
83*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));
84*4882a593Smuzhiyun return val;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
__arch_counter_get_cntpct(void)87*4882a593Smuzhiyun static inline u64 __arch_counter_get_cntpct(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun u64 cval;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun isb();
92*4882a593Smuzhiyun asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
93*4882a593Smuzhiyun return cval;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
__arch_counter_get_cntpct_stable(void)96*4882a593Smuzhiyun static inline u64 __arch_counter_get_cntpct_stable(void)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun return __arch_counter_get_cntpct();
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
__arch_counter_get_cntvct(void)101*4882a593Smuzhiyun static inline u64 __arch_counter_get_cntvct(void)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun u64 cval;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun isb();
106*4882a593Smuzhiyun asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
107*4882a593Smuzhiyun return cval;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
__arch_counter_get_cntvct_stable(void)110*4882a593Smuzhiyun static inline u64 __arch_counter_get_cntvct_stable(void)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun return __arch_counter_get_cntvct();
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
arch_timer_get_cntkctl(void)115*4882a593Smuzhiyun static inline u32 arch_timer_get_cntkctl(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun u32 cntkctl;
118*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
119*4882a593Smuzhiyun return cntkctl;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
arch_timer_set_cntkctl(u32 cntkctl)122*4882a593Smuzhiyun static inline void arch_timer_set_cntkctl(u32 cntkctl)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
125*4882a593Smuzhiyun isb();
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
arch_timer_set_evtstrm_feature(void)128*4882a593Smuzhiyun static inline void arch_timer_set_evtstrm_feature(void)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun elf_hwcap |= HWCAP_EVTSTRM;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
arch_timer_have_evtstrm_feature(void)133*4882a593Smuzhiyun static inline bool arch_timer_have_evtstrm_feature(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun return elf_hwcap & HWCAP_EVTSTRM;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun #endif
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #endif
140