1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Xilinx ZC770 XM013 board DTS 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Xilinx, Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "zynq-7000.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Xilinx ZC770 XM013 board"; 12*4882a593Smuzhiyun compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun ethernet0 = &gem1; 16*4882a593Smuzhiyun i2c0 = &i2c1; 17*4882a593Smuzhiyun serial0 = &uart0; 18*4882a593Smuzhiyun spi1 = &spi0; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun bootargs = ""; 23*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun memory@0 { 27*4882a593Smuzhiyun device_type = "memory"; 28*4882a593Smuzhiyun reg = <0x0 0x40000000>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&can1 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&gem1 { 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun phy-mode = "rgmii-id"; 39*4882a593Smuzhiyun phy-handle = <ðernet_phy>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun ethernet_phy: ethernet-phy@7 { 42*4882a593Smuzhiyun reg = <7>; 43*4882a593Smuzhiyun device_type = "ethernet-phy"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&i2c1 { 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun clock-frequency = <400000>; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun si570: clock-generator@55 { 52*4882a593Smuzhiyun #clock-cells = <0>; 53*4882a593Smuzhiyun compatible = "silabs,si570"; 54*4882a593Smuzhiyun temperature-stability = <50>; 55*4882a593Smuzhiyun reg = <0x55>; 56*4882a593Smuzhiyun factory-fout = <156250000>; 57*4882a593Smuzhiyun clock-frequency = <148500000>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&spi0 { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun num-cs = <4>; 64*4882a593Smuzhiyun is-decoded-cs = <0>; 65*4882a593Smuzhiyun eeprom: eeprom@2 { 66*4882a593Smuzhiyun at25,byte-len = <8192>; 67*4882a593Smuzhiyun at25,addr-mode = <2>; 68*4882a593Smuzhiyun at25,page-size = <32>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun compatible = "atmel,at25"; 71*4882a593Smuzhiyun reg = <2>; 72*4882a593Smuzhiyun spi-max-frequency = <1000000>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun}; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun&uart0 { 77*4882a593Smuzhiyun status = "okay"; 78*4882a593Smuzhiyun}; 79