1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Xilinx ZC770 XM012 board DTS 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013-2018 Xilinx, Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "zynq-7000.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Xilinx ZC770 XM012 board"; 12*4882a593Smuzhiyun compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun i2c0 = &i2c0; 16*4882a593Smuzhiyun i2c1 = &i2c1; 17*4882a593Smuzhiyun serial0 = &uart1; 18*4882a593Smuzhiyun spi0 = &spi1; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun bootargs = ""; 23*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun memory@0 { 27*4882a593Smuzhiyun device_type = "memory"; 28*4882a593Smuzhiyun reg = <0x0 0x40000000>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&can1 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&i2c0 { 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun clock-frequency = <400000>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun eeprom0: eeprom@52 { 41*4882a593Smuzhiyun compatible = "atmel,24c02"; 42*4882a593Smuzhiyun reg = <0x52>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&i2c1 { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun clock-frequency = <400000>; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun eeprom1: eeprom@52 { 51*4882a593Smuzhiyun compatible = "atmel,24c02"; 52*4882a593Smuzhiyun reg = <0x52>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&spi1 { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun num-cs = <4>; 59*4882a593Smuzhiyun is-decoded-cs = <0>; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&uart1 { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun}; 65