1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2014-2020 Toradex 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun chosen { 8*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 9*4882a593Smuzhiyun }; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun clk16m: clk16m { 12*4882a593Smuzhiyun compatible = "fixed-clock"; 13*4882a593Smuzhiyun #clock-cells = <0>; 14*4882a593Smuzhiyun clock-frequency = <16000000>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun panel: panel { 18*4882a593Smuzhiyun compatible = "edt,et057090dhu"; 19*4882a593Smuzhiyun backlight = <&bl>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun port { 22*4882a593Smuzhiyun panel_in: endpoint { 23*4882a593Smuzhiyun remote-endpoint = <&dcu_out>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun reg_3v3: regulator-3v3 { 29*4882a593Smuzhiyun compatible = "regulator-fixed"; 30*4882a593Smuzhiyun regulator-name = "3.3V"; 31*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 32*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun reg_5v0: regulator-5v0 { 36*4882a593Smuzhiyun compatible = "regulator-fixed"; 37*4882a593Smuzhiyun regulator-name = "5V"; 38*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 39*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun reg_usbh_vbus: regulator-usbh-vbus { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun pinctrl-names = "default"; 45*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbh1_reg>; 46*4882a593Smuzhiyun regulator-name = "VCC_USB[1-4]"; 47*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 49*4882a593Smuzhiyun gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN resp. USBH_P_EN */ 50*4882a593Smuzhiyun vin-supply = <®_5v0>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&bl { 55*4882a593Smuzhiyun brightness-levels = <0 4 8 16 32 64 128 255>; 56*4882a593Smuzhiyun default-brightness-level = <6>; 57*4882a593Smuzhiyun power-supply = <®_3v3>; 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&dcu0 { 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_dcu0_1>; 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun port { 67*4882a593Smuzhiyun dcu_out: endpoint { 68*4882a593Smuzhiyun remote-endpoint = <&panel_in>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&dspi1 { 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun mcp2515can: can@0 { 77*4882a593Smuzhiyun compatible = "microchip,mcp2515"; 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can_int>; 80*4882a593Smuzhiyun reg = <0>; 81*4882a593Smuzhiyun clocks = <&clk16m>; 82*4882a593Smuzhiyun spi-max-frequency = <10000000>; 83*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 84*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_EDGE_RISING>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&esdhc1 { 89*4882a593Smuzhiyun pinctrl-names = "default"; 90*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_esdhc1>; 91*4882a593Smuzhiyun bus-width = <4>; 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&fec1 { 96*4882a593Smuzhiyun phy-mode = "rmii"; 97*4882a593Smuzhiyun pinctrl-names = "default"; 98*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_fec1>; 99*4882a593Smuzhiyun status = "okay"; 100*4882a593Smuzhiyun}; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun&i2c0 { 103*4882a593Smuzhiyun status = "okay"; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* M41T0M6 real time clock on carrier board */ 106*4882a593Smuzhiyun rtc: m41t0m6@68 { 107*4882a593Smuzhiyun compatible = "st,m41t0"; 108*4882a593Smuzhiyun reg = <0x68>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&pwm0 { 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&pwm1 { 117*4882a593Smuzhiyun status = "okay"; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun®_module_3v3 { 121*4882a593Smuzhiyun vin-supply = <®_3v3>; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&tcon0 { 125*4882a593Smuzhiyun status = "okay"; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&uart0 { 129*4882a593Smuzhiyun status = "okay"; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&uart1 { 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&uart2 { 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&usbh1 { 141*4882a593Smuzhiyun vbus-supply = <®_usbh_vbus>; 142*4882a593Smuzhiyun}; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun&iomuxc { 145*4882a593Smuzhiyun vf610-colibri { 146*4882a593Smuzhiyun pinctrl_can_int: can_int { 147*4882a593Smuzhiyun fsl,pins = < 148*4882a593Smuzhiyun VF610_PAD_PTB21__GPIO_43 0x22ed 149*4882a593Smuzhiyun >; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun}; 153