1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Device Tree Source for UniPhier Pro4 Reference Board 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// Copyright (C) 2015-2016 Socionext Inc. 6*4882a593Smuzhiyun// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "uniphier-pro4.dtsi" 10*4882a593Smuzhiyun#include "uniphier-ref-daughter.dtsi" 11*4882a593Smuzhiyun#include "uniphier-support-card.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "UniPhier Pro4 Reference Board"; 15*4882a593Smuzhiyun compatible = "socionext,uniphier-pro4-ref", "socionext,uniphier-pro4"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun chosen { 18*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun aliases { 22*4882a593Smuzhiyun serial0 = &serial0; 23*4882a593Smuzhiyun serial1 = &serial1; 24*4882a593Smuzhiyun serial2 = &serial2; 25*4882a593Smuzhiyun serial3 = &serialsc; 26*4882a593Smuzhiyun i2c0 = &i2c0; 27*4882a593Smuzhiyun i2c1 = &i2c1; 28*4882a593Smuzhiyun i2c2 = &i2c2; 29*4882a593Smuzhiyun i2c3 = &i2c3; 30*4882a593Smuzhiyun i2c5 = &i2c5; 31*4882a593Smuzhiyun i2c6 = &i2c6; 32*4882a593Smuzhiyun ethernet0 = ð 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun memory@80000000 { 36*4882a593Smuzhiyun device_type = "memory"; 37*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun}; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunðsc { 42*4882a593Smuzhiyun interrupts = <2 8>; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun&serialsc { 46*4882a593Smuzhiyun interrupts = <2 8>; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun&serial0 { 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&serial1 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&serial2 { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&gpio { 62*4882a593Smuzhiyun xirq2 { 63*4882a593Smuzhiyun gpio-hog; 64*4882a593Smuzhiyun gpios = <UNIPHIER_GPIO_IRQ(2) 0>; 65*4882a593Smuzhiyun input; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&i2c0 { 70*4882a593Smuzhiyun status = "okay"; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&sd { 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&usb2 { 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&usb3 { 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyunð { 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun phy-handle = <ðphy>; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&mdio { 91*4882a593Smuzhiyun ethphy: ethernet-phy@0 { 92*4882a593Smuzhiyun reg = <0>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&usb0 { 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun}; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun&usb1 { 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun}; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun&nand { 105*4882a593Smuzhiyun status = "okay"; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun nand@0 { 108*4882a593Smuzhiyun reg = <0>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111