1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Device Tree Source for UniPhier LD6b Reference Board 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// Copyright (C) 2015-2016 Socionext Inc. 6*4882a593Smuzhiyun// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "uniphier-ld6b.dtsi" 10*4882a593Smuzhiyun#include "uniphier-ref-daughter.dtsi" 11*4882a593Smuzhiyun#include "uniphier-support-card.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "UniPhier LD6b Reference Board"; 15*4882a593Smuzhiyun compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun chosen { 18*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun aliases { 22*4882a593Smuzhiyun serial0 = &serial0; 23*4882a593Smuzhiyun serial1 = &serial1; 24*4882a593Smuzhiyun serial2 = &serial2; 25*4882a593Smuzhiyun serial3 = &serialsc; 26*4882a593Smuzhiyun i2c0 = &i2c0; 27*4882a593Smuzhiyun i2c1 = &i2c1; 28*4882a593Smuzhiyun i2c2 = &i2c2; 29*4882a593Smuzhiyun i2c3 = &i2c3; 30*4882a593Smuzhiyun i2c4 = &i2c4; 31*4882a593Smuzhiyun i2c5 = &i2c5; 32*4882a593Smuzhiyun i2c6 = &i2c6; 33*4882a593Smuzhiyun ethernet0 = ð 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun memory@80000000 { 37*4882a593Smuzhiyun device_type = "memory"; 38*4882a593Smuzhiyun reg = <0x80000000 0x80000000>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunðsc { 43*4882a593Smuzhiyun interrupts = <4 8>; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&serialsc { 47*4882a593Smuzhiyun interrupts = <4 8>; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&serial0 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&serial1 { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&serial2 { 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&gpio { 63*4882a593Smuzhiyun xirq4 { 64*4882a593Smuzhiyun gpio-hog; 65*4882a593Smuzhiyun gpios = <UNIPHIER_GPIO_IRQ(4) 0>; 66*4882a593Smuzhiyun input; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun}; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun&i2c0 { 71*4882a593Smuzhiyun status = "okay"; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&sd { 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyunð { 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun phy-handle = <ðphy>; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&mdio { 84*4882a593Smuzhiyun ethphy: ethernet-phy@0 { 85*4882a593Smuzhiyun reg = <0>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&usb0 { 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&usb1 { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&nand { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun nand@0 { 101*4882a593Smuzhiyun reg = <0>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun}; 104