1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun&twl { 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * On most OMAP4 platforms, the twl6030 IRQ line is connected 9*4882a593Smuzhiyun * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is 10*4882a593Smuzhiyun * connected to the fref_clk0_out.sys_drm_msecure line. 11*4882a593Smuzhiyun * Therefore, configure the defaults for the SYS_NIRQ1 and 12*4882a593Smuzhiyun * fref_clk0_out.sys_drm_msecure pins here. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun pinctrl-names = "default"; 15*4882a593Smuzhiyun pinctrl-0 = < 16*4882a593Smuzhiyun &twl6030_pins 17*4882a593Smuzhiyun &twl6030_wkup_pins 18*4882a593Smuzhiyun >; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&omap4_pmx_wkup { 22*4882a593Smuzhiyun twl6030_wkup_pins: pinmux_twl6030_wkup_pins { 23*4882a593Smuzhiyun pinctrl-single,pins = < 24*4882a593Smuzhiyun OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ 25*4882a593Smuzhiyun >; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&omap4_pmx_core { 30*4882a593Smuzhiyun twl6030_pins: pinmux_twl6030_pins { 31*4882a593Smuzhiyun pinctrl-single,pins = < 32*4882a593Smuzhiyun OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ 33*4882a593Smuzhiyun >; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun}; 36