1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2013 Linaro, Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun&twl { 7*4882a593Smuzhiyun pinctrl-names = "default"; 8*4882a593Smuzhiyun pinctrl-0 = <&twl4030_pins &twl4030_vpins>; 9*4882a593Smuzhiyun}; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun&omap3_pmx_core { 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * On most OMAP3 platforms, the twl4030 IRQ line is connected 14*4882a593Smuzhiyun * to the SYS_NIRQ line on OMAP. Therefore, configure the 15*4882a593Smuzhiyun * defaults for the SYS_NIRQ pin here. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun twl4030_pins: pinmux_twl4030_pins { 18*4882a593Smuzhiyun pinctrl-single,pins = < 19*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */ 20*4882a593Smuzhiyun >; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun/* 25*4882a593Smuzhiyun * If your board is not using the I2C4 pins with twl4030, then don't include 26*4882a593Smuzhiyun * this file. For proper idle mode signaling with sys_clkreq and sys_off_mode 27*4882a593Smuzhiyun * pins we need to configure I2C4, or else use the legacy sys_nvmode1 and 28*4882a593Smuzhiyun * sys_nvmode2 signaling. 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun&omap3_pmx_wkup { 31*4882a593Smuzhiyun twl4030_vpins: pinmux_twl4030_vpins { 32*4882a593Smuzhiyun pinctrl-single,pins = < 33*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a00, PIN_INPUT | MUX_MODE0) /* i2c4_scl.i2c4_scl */ 34*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a02, PIN_INPUT | MUX_MODE0) /* i2c4_sda.i2c4_sda */ 35*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a06, PIN_OUTPUT | MUX_MODE0) /* sys_clkreq.sys_clkreq */ 36*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a18, PIN_OUTPUT | MUX_MODE0) /* sys_off_mode.sys_off_mode */ 37*4882a593Smuzhiyun >; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun}; 40