xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun#include "tegra30-asus-nexus7-grouper-common.dtsi"
4*4882a593Smuzhiyun#include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30";
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun	display-panel {
10*4882a593Smuzhiyun		enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun		panel-timing {
13*4882a593Smuzhiyun			clock-frequency = <81750000>;
14*4882a593Smuzhiyun			hactive = <800>;
15*4882a593Smuzhiyun			vactive = <1280>;
16*4882a593Smuzhiyun			hfront-porch = <64>;
17*4882a593Smuzhiyun			hback-porch = <128>;
18*4882a593Smuzhiyun			hsync-len = <64>;
19*4882a593Smuzhiyun			vsync-len = <1>;
20*4882a593Smuzhiyun			vfront-porch = <5>;
21*4882a593Smuzhiyun			vback-porch = <2>;
22*4882a593Smuzhiyun		};
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	gpio@6000d000 {
26*4882a593Smuzhiyun		init-mode-3g {
27*4882a593Smuzhiyun			gpio-hog;
28*4882a593Smuzhiyun			gpios =	<TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>,
29*4882a593Smuzhiyun				<TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>,
30*4882a593Smuzhiyun				<TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>,
31*4882a593Smuzhiyun				<TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>,
32*4882a593Smuzhiyun				<TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>,
33*4882a593Smuzhiyun				<TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>,
34*4882a593Smuzhiyun				<TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>,
35*4882a593Smuzhiyun				<TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
36*4882a593Smuzhiyun				<TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>,
37*4882a593Smuzhiyun				<TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>,
38*4882a593Smuzhiyun				<TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>,
39*4882a593Smuzhiyun				<TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>,
40*4882a593Smuzhiyun				<TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>,
41*4882a593Smuzhiyun				<TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>,
42*4882a593Smuzhiyun				<TEGRA_GPIO(N, 1) GPIO_ACTIVE_HIGH>,
43*4882a593Smuzhiyun				<TEGRA_GPIO(N, 2) GPIO_ACTIVE_HIGH>,
44*4882a593Smuzhiyun				<TEGRA_GPIO(N, 0) GPIO_ACTIVE_HIGH>,
45*4882a593Smuzhiyun				<TEGRA_GPIO(N, 3) GPIO_ACTIVE_HIGH>;
46*4882a593Smuzhiyun			output-low;
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	pinmux@70000868 {
51*4882a593Smuzhiyun		state_default: pinmux {
52*4882a593Smuzhiyun			lcd_dc1_pd2 {
53*4882a593Smuzhiyun				nvidia,pins = "lcd_dc1_pd2";
54*4882a593Smuzhiyun				nvidia,function = "displaya";
55*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
56*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
57*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
58*4882a593Smuzhiyun			};
59*4882a593Smuzhiyun			lcd_pwr2_pc6 {
60*4882a593Smuzhiyun				nvidia,pins = "lcd_pwr2_pc6";
61*4882a593Smuzhiyun				nvidia,function = "displaya";
62*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
63*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
64*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
65*4882a593Smuzhiyun			};
66*4882a593Smuzhiyun			spi2_cs2_n_pw3 {
67*4882a593Smuzhiyun				nvidia,pins = "spi2_cs2_n_pw3";
68*4882a593Smuzhiyun				nvidia,function = "spi2";
69*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
70*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
71*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
72*4882a593Smuzhiyun			};
73*4882a593Smuzhiyun			dap3_din_pp1 {
74*4882a593Smuzhiyun				nvidia,pins = "dap3_din_pp1";
75*4882a593Smuzhiyun				nvidia,function = "i2s2";
76*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
77*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
78*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
79*4882a593Smuzhiyun			};
80*4882a593Smuzhiyun			spi1_sck_px5 {
81*4882a593Smuzhiyun				nvidia,pins = "spi1_sck_px5";
82*4882a593Smuzhiyun				nvidia,function = "spi1";
83*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
84*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
85*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86*4882a593Smuzhiyun			};
87*4882a593Smuzhiyun			pu5 {
88*4882a593Smuzhiyun				nvidia,pins = "pu5";
89*4882a593Smuzhiyun				nvidia,function = "pwm2";
90*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
91*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
92*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93*4882a593Smuzhiyun			};
94*4882a593Smuzhiyun			spi1_miso_px7 {
95*4882a593Smuzhiyun				nvidia,pins = "spi1_miso_px7";
96*4882a593Smuzhiyun				nvidia,function = "spi1";
97*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
98*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
99*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
100*4882a593Smuzhiyun			};
101*4882a593Smuzhiyun			spi2_mosi_px0 {
102*4882a593Smuzhiyun				nvidia,pins = "spi2_mosi_px0";
103*4882a593Smuzhiyun				nvidia,function = "spi2";
104*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
105*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
106*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun			clk3_req_pee1 {
109*4882a593Smuzhiyun				nvidia,pins = "clk3_req_pee1";
110*4882a593Smuzhiyun				nvidia,function = "dev3";
111*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
112*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
113*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun			ulpi_nxt_py2 {
116*4882a593Smuzhiyun				nvidia,pins = "ulpi_nxt_py2";
117*4882a593Smuzhiyun				nvidia,function = "uartd";
118*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
119*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
120*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun			ulpi_stp_py3 {
123*4882a593Smuzhiyun				nvidia,pins = "ulpi_stp_py3";
124*4882a593Smuzhiyun				nvidia,function = "uartd";
125*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
126*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
127*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun			kb_row7_pr7 {
130*4882a593Smuzhiyun				nvidia,pins = "kb_row7_pr7";
131*4882a593Smuzhiyun				nvidia,function = "kbc";
132*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
133*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
134*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
135*4882a593Smuzhiyun			};
136*4882a593Smuzhiyun			pu4 {
137*4882a593Smuzhiyun				nvidia,pins = "pu4";
138*4882a593Smuzhiyun				nvidia,function = "pwm1";
139*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
140*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
141*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
142*4882a593Smuzhiyun			};
143*4882a593Smuzhiyun			pu3 {
144*4882a593Smuzhiyun				nvidia,pins = "pu3";
145*4882a593Smuzhiyun				nvidia,function = "rsvd4";
146*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
147*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
148*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun			kb_row15_ps7 {
151*4882a593Smuzhiyun				nvidia,pins = "kb_row15_ps7";
152*4882a593Smuzhiyun				nvidia,function = "kbc";
153*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
155*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun			dap3_sclk_pp3 {
158*4882a593Smuzhiyun				nvidia,pins = "dap3_sclk_pp3";
159*4882a593Smuzhiyun				nvidia,function = "i2s2";
160*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
161*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
162*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
163*4882a593Smuzhiyun			};
164*4882a593Smuzhiyun			kb_row3_pr3 {
165*4882a593Smuzhiyun				nvidia,pins = "kb_row3_pr3",
166*4882a593Smuzhiyun						"kb_row13_ps5";
167*4882a593Smuzhiyun				nvidia,function = "kbc";
168*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
169*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
170*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun			kb_row13_ps5 {
173*4882a593Smuzhiyun				nvidia,pins = "kb_row13_ps5";
174*4882a593Smuzhiyun				nvidia,function = "kbc";
175*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
176*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
177*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178*4882a593Smuzhiyun			};
179*4882a593Smuzhiyun			gmi_wp_n_pc7 {
180*4882a593Smuzhiyun				nvidia,pins = "gmi_wp_n_pc7",
181*4882a593Smuzhiyun						"gmi_wait_pi7",
182*4882a593Smuzhiyun						"gmi_cs4_n_pk2",
183*4882a593Smuzhiyun						"gmi_cs3_n_pk4";
184*4882a593Smuzhiyun				nvidia,function = "rsvd1";
185*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
186*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
187*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
188*4882a593Smuzhiyun			};
189*4882a593Smuzhiyun			gmi_cs6_n_pi3 {
190*4882a593Smuzhiyun				nvidia,pins = "gmi_cs6_n_pi3";
191*4882a593Smuzhiyun				nvidia,function = "gmi";
192*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
194*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
195*4882a593Smuzhiyun			};
196*4882a593Smuzhiyun		};
197*4882a593Smuzhiyun	};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun	i2c@7000c500 {
200*4882a593Smuzhiyun		proximity-sensor@28 {
201*4882a593Smuzhiyun			compatible = "microchip,cap1106";
202*4882a593Smuzhiyun			reg = <0x28>;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun			/*
205*4882a593Smuzhiyun			 * Binding doesn't support specifying linux,input-type
206*4882a593Smuzhiyun			 * and this results in unwanted key-presses handled by
207*4882a593Smuzhiyun			 * applications, hence keep it disabled for now.
208*4882a593Smuzhiyun			 */
209*4882a593Smuzhiyun			status = "disabled";
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
212*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			linux,keycodes = <KEY_RESERVED>,
215*4882a593Smuzhiyun					 <KEY_RESERVED>,
216*4882a593Smuzhiyun					 <KEY_RESERVED>,
217*4882a593Smuzhiyun					 <KEY_RESERVED>,
218*4882a593Smuzhiyun					 <KEY_RESERVED>,
219*4882a593Smuzhiyun					 <SW_FRONT_PROXIMITY>;
220*4882a593Smuzhiyun		};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun		nfc@2a {
223*4882a593Smuzhiyun			compatible = "nxp,pn544-i2c";
224*4882a593Smuzhiyun			reg = <0x2a>;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			clock-frequency = <100000>;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
229*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun			enable-gpios   = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
232*4882a593Smuzhiyun			firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun};
236