xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra30-asus-nexus7-grouper.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun#include "tegra30-asus-nexus7-grouper-common.dtsi"
4*4882a593Smuzhiyun#include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	compatible = "asus,grouper", "nvidia,tegra30";
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun	display-panel {
10*4882a593Smuzhiyun		panel-timing {
11*4882a593Smuzhiyun			clock-frequency = <68000000>;
12*4882a593Smuzhiyun			hactive = <800>;
13*4882a593Smuzhiyun			vactive = <1280>;
14*4882a593Smuzhiyun			hfront-porch = <24>;
15*4882a593Smuzhiyun			hback-porch = <32>;
16*4882a593Smuzhiyun			hsync-len = <24>;
17*4882a593Smuzhiyun			vsync-len = <1>;
18*4882a593Smuzhiyun			vfront-porch = <5>;
19*4882a593Smuzhiyun			vback-porch = <32>;
20*4882a593Smuzhiyun		};
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	pinmux@70000868 {
24*4882a593Smuzhiyun		state_default: pinmux {
25*4882a593Smuzhiyun			lcd_dc1_pd2 {
26*4882a593Smuzhiyun				nvidia,pins = "lcd_dc1_pd2";
27*4882a593Smuzhiyun				nvidia,function = "displaya";
28*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
29*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
30*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
31*4882a593Smuzhiyun			};
32*4882a593Smuzhiyun			lcd_pwr2_pc6 {
33*4882a593Smuzhiyun				nvidia,pins = "lcd_pwr2_pc6";
34*4882a593Smuzhiyun				nvidia,function = "displaya";
35*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
36*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
37*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
38*4882a593Smuzhiyun			};
39*4882a593Smuzhiyun			spi2_cs2_n_pw3 {
40*4882a593Smuzhiyun				nvidia,pins = "spi2_cs2_n_pw3";
41*4882a593Smuzhiyun				nvidia,function = "spi2";
42*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
43*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
44*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
45*4882a593Smuzhiyun			};
46*4882a593Smuzhiyun			spi1_sck_px5 {
47*4882a593Smuzhiyun				nvidia,pins = "spi1_sck_px5";
48*4882a593Smuzhiyun				nvidia,function = "spi1";
49*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
50*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
51*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun			pu5 {
54*4882a593Smuzhiyun				nvidia,pins = "pu5";
55*4882a593Smuzhiyun				nvidia,function = "pwm2";
56*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
57*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
58*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
59*4882a593Smuzhiyun			};
60*4882a593Smuzhiyun			spi1_miso_px7 {
61*4882a593Smuzhiyun				nvidia,pins = "spi1_miso_px7";
62*4882a593Smuzhiyun				nvidia,function = "spi1";
63*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
64*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
65*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun			spi2_mosi_px0 {
68*4882a593Smuzhiyun				nvidia,pins = "spi2_mosi_px0";
69*4882a593Smuzhiyun				nvidia,function = "spi2";
70*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
71*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
72*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
73*4882a593Smuzhiyun			};
74*4882a593Smuzhiyun			kb_row7_pr7 {
75*4882a593Smuzhiyun				nvidia,pins = "kb_row7_pr7";
76*4882a593Smuzhiyun				nvidia,function = "kbc";
77*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
78*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
79*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
80*4882a593Smuzhiyun			};
81*4882a593Smuzhiyun			pu3 {
82*4882a593Smuzhiyun				nvidia,pins = "pu3";
83*4882a593Smuzhiyun				nvidia,function = "rsvd4";
84*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
85*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
86*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
87*4882a593Smuzhiyun			};
88*4882a593Smuzhiyun			pu4 {
89*4882a593Smuzhiyun				nvidia,pins = "pu4";
90*4882a593Smuzhiyun				nvidia,function = "pwm1";
91*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
92*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
93*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun			kb_row15_ps7 {
96*4882a593Smuzhiyun				nvidia,pins = "kb_row15_ps7";
97*4882a593Smuzhiyun				nvidia,function = "kbc";
98*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
100*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun			kb_row3_pr3 {
103*4882a593Smuzhiyun				nvidia,pins = "kb_row3_pr3";
104*4882a593Smuzhiyun				nvidia,function = "kbc";
105*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
107*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun			kb_row13_ps5 {
110*4882a593Smuzhiyun				nvidia,pins = "kb_row13_ps5";
111*4882a593Smuzhiyun				nvidia,function = "kbc";
112*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
113*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
114*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun			gmi_wp_n_pc7 {
117*4882a593Smuzhiyun				nvidia,pins = "gmi_wp_n_pc7",
118*4882a593Smuzhiyun						"gmi_wait_pi7",
119*4882a593Smuzhiyun						"gmi_cs4_n_pk2",
120*4882a593Smuzhiyun						"gmi_cs3_n_pk4";
121*4882a593Smuzhiyun				nvidia,function = "rsvd1";
122*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
124*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125*4882a593Smuzhiyun			};
126*4882a593Smuzhiyun			gmi_cs6_n_pi3 {
127*4882a593Smuzhiyun				nvidia,pins = "gmi_cs6_n_pi3";
128*4882a593Smuzhiyun				nvidia,function = "gmi";
129*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
131*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	i2c@7000c500 {
137*4882a593Smuzhiyun		nfc@28 {
138*4882a593Smuzhiyun			compatible = "nxp,pn544-i2c";
139*4882a593Smuzhiyun			reg = <0x28>;
140*4882a593Smuzhiyun			clock-frequency = <100000>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
143*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_EDGE_RISING>;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun			enable-gpios   = <&gpio TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
146*4882a593Smuzhiyun			firmware-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun};
150