xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra20-medcom-wide.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include "tegra20-tamonten.dtsi"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	model = "Avionic Design Medcom-Wide board";
8*4882a593Smuzhiyun	compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun	aliases {
11*4882a593Smuzhiyun		serial0 = &uartd;
12*4882a593Smuzhiyun	};
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	pwm@7000a000 {
19*4882a593Smuzhiyun		status = "okay";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	host1x@50000000 {
23*4882a593Smuzhiyun		dc@54200000 {
24*4882a593Smuzhiyun			rgb {
25*4882a593Smuzhiyun				status = "okay";
26*4882a593Smuzhiyun				nvidia,panel = <&panel>;
27*4882a593Smuzhiyun			};
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	i2c@7000c000 {
32*4882a593Smuzhiyun		wm8903: wm8903@1a {
33*4882a593Smuzhiyun			compatible = "wlf,wm8903";
34*4882a593Smuzhiyun			reg = <0x1a>;
35*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
36*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun			gpio-controller;
39*4882a593Smuzhiyun			#gpio-cells = <2>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun			micdet-cfg = <0>;
42*4882a593Smuzhiyun			micdet-delay = <100>;
43*4882a593Smuzhiyun			gpio-cfg = <0xffffffff
44*4882a593Smuzhiyun				    0xffffffff
45*4882a593Smuzhiyun				    0
46*4882a593Smuzhiyun				    0xffffffff
47*4882a593Smuzhiyun				    0xffffffff>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	backlight: backlight {
52*4882a593Smuzhiyun		compatible = "pwm-backlight";
53*4882a593Smuzhiyun		pwms = <&pwm 0 5000000>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
56*4882a593Smuzhiyun		default-brightness-level = <6>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	panel: panel {
60*4882a593Smuzhiyun		compatible = "innolux,n156bge-l21";
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		power-supply =  <&vdd_1v8_reg>; // <&vdd_3v3_reg>;
63*4882a593Smuzhiyun		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		backlight = <&backlight>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	sound {
69*4882a593Smuzhiyun		compatible = "ad,tegra-audio-wm8903-medcom-wide",
70*4882a593Smuzhiyun			     "nvidia,tegra-audio-wm8903";
71*4882a593Smuzhiyun		nvidia,model = "Avionic Design Medcom-Wide";
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		nvidia,audio-routing =
74*4882a593Smuzhiyun			"Headphone Jack", "HPOUTR",
75*4882a593Smuzhiyun			"Headphone Jack", "HPOUTL",
76*4882a593Smuzhiyun			"Int Spk", "ROP",
77*4882a593Smuzhiyun			"Int Spk", "RON",
78*4882a593Smuzhiyun			"Int Spk", "LOP",
79*4882a593Smuzhiyun			"Int Spk", "LON",
80*4882a593Smuzhiyun			"Mic Jack", "MICBIAS",
81*4882a593Smuzhiyun			"IN1L", "Mic Jack";
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		nvidia,i2s-controller = <&tegra_i2s1>;
84*4882a593Smuzhiyun		nvidia,audio-codec = <&wm8903>;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
87*4882a593Smuzhiyun		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
90*4882a593Smuzhiyun			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
91*4882a593Smuzhiyun			 <&tegra_car TEGRA20_CLK_CDEV1>;
92*4882a593Smuzhiyun		clock-names = "pll_a", "pll_a_out0", "mclk";
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	vcc_24v_reg: regulator@100 {
96*4882a593Smuzhiyun		compatible = "regulator-fixed";
97*4882a593Smuzhiyun		regulator-name = "vcc_24v";
98*4882a593Smuzhiyun		regulator-min-microvolt = <24000000>;
99*4882a593Smuzhiyun		regulator-max-microvolt = <24000000>;
100*4882a593Smuzhiyun		regulator-always-on;
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	vdd_5v0_reg: regulator@101 {
104*4882a593Smuzhiyun		compatible = "regulator-fixed";
105*4882a593Smuzhiyun		regulator-name = "vdd_5v0";
106*4882a593Smuzhiyun		vin-supply = <&vcc_24v_reg>;
107*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
108*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
109*4882a593Smuzhiyun		regulator-always-on;
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	vdd_3v3_reg: regulator@102 {
113*4882a593Smuzhiyun		compatible = "regulator-fixed";
114*4882a593Smuzhiyun		regulator-name = "vdd_3v3";
115*4882a593Smuzhiyun		vin-supply = <&vcc_24v_reg>;
116*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
117*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
118*4882a593Smuzhiyun		regulator-always-on;
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun	vdd_1v8_reg: regulator@103 {
122*4882a593Smuzhiyun		compatible = "regulator-fixed";
123*4882a593Smuzhiyun		regulator-name = "vdd_1v8";
124*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_reg>;
125*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
126*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
127*4882a593Smuzhiyun		regulator-always-on;
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun};
130