xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra124-venice2.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
5*4882a593Smuzhiyun#include "tegra124.dtsi"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	model = "NVIDIA Tegra124 Venice2";
9*4882a593Smuzhiyun	compatible = "nvidia,venice2", "nvidia,tegra124";
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	aliases {
12*4882a593Smuzhiyun		rtc0 = "/i2c@7000d000/pmic@40";
13*4882a593Smuzhiyun		rtc1 = "/rtc@7000e000";
14*4882a593Smuzhiyun		serial0 = &uarta;
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	memory@80000000 {
22*4882a593Smuzhiyun		reg = <0x0 0x80000000 0x0 0x80000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	host1x@50000000 {
26*4882a593Smuzhiyun		hdmi@54280000 {
27*4882a593Smuzhiyun			status = "okay";
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun			vdd-supply = <&vdd_3v3_hdmi>;
30*4882a593Smuzhiyun			pll-supply = <&vdd_hdmi_pll>;
31*4882a593Smuzhiyun			hdmi-supply = <&vdd_5v0_hdmi>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34*4882a593Smuzhiyun			nvidia,hpd-gpio =
35*4882a593Smuzhiyun				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		sor@54540000 {
39*4882a593Smuzhiyun			status = "okay";
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun			avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
42*4882a593Smuzhiyun			vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun			nvidia,dpaux = <&dpaux>;
45*4882a593Smuzhiyun			nvidia,panel = <&panel>;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		dpaux@545c0000 {
49*4882a593Smuzhiyun			vdd-supply = <&vdd_3v3_panel>;
50*4882a593Smuzhiyun			status = "okay";
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun			aux-bus {
53*4882a593Smuzhiyun				panel: panel {
54*4882a593Smuzhiyun					compatible = "lg,lp129qe";
55*4882a593Smuzhiyun					backlight = <&backlight>;
56*4882a593Smuzhiyun				};
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	gpu@0,57000000 {
62*4882a593Smuzhiyun		/*
63*4882a593Smuzhiyun		 * Node left disabled on purpose - the bootloader will enable
64*4882a593Smuzhiyun		 * it after having set the VPR up
65*4882a593Smuzhiyun		 */
66*4882a593Smuzhiyun		vdd-supply = <&vdd_gpu>;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	pinmux: pinmux@70000868 {
70*4882a593Smuzhiyun		pinctrl-names = "boot";
71*4882a593Smuzhiyun		pinctrl-0 = <&pinmux_boot>;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		pinmux_boot: common {
74*4882a593Smuzhiyun			dap_mclk1_pw4 {
75*4882a593Smuzhiyun				nvidia,pins = "dap_mclk1_pw4";
76*4882a593Smuzhiyun				nvidia,function = "extperiph1";
77*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
78*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
79*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
80*4882a593Smuzhiyun			};
81*4882a593Smuzhiyun			dap1_din_pn1 {
82*4882a593Smuzhiyun				nvidia,pins = "dap1_din_pn1";
83*4882a593Smuzhiyun				nvidia,function = "i2s0";
84*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
86*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
87*4882a593Smuzhiyun			};
88*4882a593Smuzhiyun			dap1_dout_pn2 {
89*4882a593Smuzhiyun				nvidia,pins = "dap1_dout_pn2",
90*4882a593Smuzhiyun					      "dap1_fs_pn0",
91*4882a593Smuzhiyun					      "dap1_sclk_pn3";
92*4882a593Smuzhiyun				nvidia,function = "i2s0";
93*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
94*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
95*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun			dap2_din_pa4 {
98*4882a593Smuzhiyun				nvidia,pins = "dap2_din_pa4";
99*4882a593Smuzhiyun				nvidia,function = "i2s1";
100*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
103*4882a593Smuzhiyun			};
104*4882a593Smuzhiyun			dap2_dout_pa5 {
105*4882a593Smuzhiyun				nvidia,pins = "dap2_dout_pa5",
106*4882a593Smuzhiyun					      "dap2_fs_pa2",
107*4882a593Smuzhiyun					      "dap2_sclk_pa3";
108*4882a593Smuzhiyun				nvidia,function = "i2s1";
109*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
110*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
112*4882a593Smuzhiyun			};
113*4882a593Smuzhiyun			dvfs_pwm_px0 {
114*4882a593Smuzhiyun				nvidia,pins = "dvfs_pwm_px0",
115*4882a593Smuzhiyun					      "dvfs_clk_px2";
116*4882a593Smuzhiyun				nvidia,function = "cldvfs";
117*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
118*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
119*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun			ulpi_clk_py0 {
122*4882a593Smuzhiyun				nvidia,pins = "ulpi_clk_py0",
123*4882a593Smuzhiyun					      "ulpi_nxt_py2",
124*4882a593Smuzhiyun					      "ulpi_stp_py3";
125*4882a593Smuzhiyun				nvidia,function = "spi1";
126*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
127*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun			ulpi_dir_py1 {
131*4882a593Smuzhiyun				nvidia,pins = "ulpi_dir_py1";
132*4882a593Smuzhiyun				nvidia,function = "spi1";
133*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
135*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
136*4882a593Smuzhiyun			};
137*4882a593Smuzhiyun			cam_i2c_scl_pbb1 {
138*4882a593Smuzhiyun				nvidia,pins = "cam_i2c_scl_pbb1",
139*4882a593Smuzhiyun					      "cam_i2c_sda_pbb2";
140*4882a593Smuzhiyun				nvidia,function = "i2c3";
141*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
144*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
145*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun			gen2_i2c_scl_pt5 {
148*4882a593Smuzhiyun				nvidia,pins = "gen2_i2c_scl_pt5",
149*4882a593Smuzhiyun					      "gen2_i2c_sda_pt6";
150*4882a593Smuzhiyun				nvidia,function = "i2c2";
151*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
152*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
154*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
155*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun			pg4 {
158*4882a593Smuzhiyun				nvidia,pins = "pg4",
159*4882a593Smuzhiyun					      "pg5",
160*4882a593Smuzhiyun					      "pg6",
161*4882a593Smuzhiyun					      "pi3";
162*4882a593Smuzhiyun				nvidia,function = "spi4";
163*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
164*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
166*4882a593Smuzhiyun			};
167*4882a593Smuzhiyun			pg7 {
168*4882a593Smuzhiyun				nvidia,pins = "pg7";
169*4882a593Smuzhiyun				nvidia,function = "spi4";
170*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
172*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
173*4882a593Smuzhiyun			};
174*4882a593Smuzhiyun			ph1 {
175*4882a593Smuzhiyun				nvidia,pins = "ph1";
176*4882a593Smuzhiyun				nvidia,function = "pwm1";
177*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
178*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
179*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun			pk0 {
182*4882a593Smuzhiyun				nvidia,pins = "pk0",
183*4882a593Smuzhiyun					      "kb_row15_ps7",
184*4882a593Smuzhiyun					      "clk_32k_out_pa0";
185*4882a593Smuzhiyun				nvidia,function = "soc";
186*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
187*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
188*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
189*4882a593Smuzhiyun			};
190*4882a593Smuzhiyun			sdmmc1_clk_pz0 {
191*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_clk_pz0";
192*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
193*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
194*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
195*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
196*4882a593Smuzhiyun			};
197*4882a593Smuzhiyun			sdmmc1_cmd_pz1 {
198*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_cmd_pz1",
199*4882a593Smuzhiyun					      "sdmmc1_dat0_py7",
200*4882a593Smuzhiyun					      "sdmmc1_dat1_py6",
201*4882a593Smuzhiyun					      "sdmmc1_dat2_py5",
202*4882a593Smuzhiyun					      "sdmmc1_dat3_py4";
203*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
204*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
205*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
206*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
207*4882a593Smuzhiyun			};
208*4882a593Smuzhiyun			sdmmc3_clk_pa6 {
209*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_clk_pa6";
210*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
211*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
212*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun			sdmmc3_cmd_pa7 {
216*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_cmd_pa7",
217*4882a593Smuzhiyun					      "sdmmc3_dat0_pb7",
218*4882a593Smuzhiyun					      "sdmmc3_dat1_pb6",
219*4882a593Smuzhiyun					      "sdmmc3_dat2_pb5",
220*4882a593Smuzhiyun					      "sdmmc3_dat3_pb4",
221*4882a593Smuzhiyun					      "sdmmc3_clk_lb_out_pee4",
222*4882a593Smuzhiyun					      "sdmmc3_clk_lb_in_pee5";
223*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
224*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
225*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
226*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
227*4882a593Smuzhiyun			};
228*4882a593Smuzhiyun			sdmmc4_clk_pcc4 {
229*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_clk_pcc4";
230*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
231*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
233*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
234*4882a593Smuzhiyun			};
235*4882a593Smuzhiyun			sdmmc4_cmd_pt7 {
236*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_cmd_pt7",
237*4882a593Smuzhiyun					      "sdmmc4_dat0_paa0",
238*4882a593Smuzhiyun					      "sdmmc4_dat1_paa1",
239*4882a593Smuzhiyun					      "sdmmc4_dat2_paa2",
240*4882a593Smuzhiyun					      "sdmmc4_dat3_paa3",
241*4882a593Smuzhiyun					      "sdmmc4_dat4_paa4",
242*4882a593Smuzhiyun					      "sdmmc4_dat5_paa5",
243*4882a593Smuzhiyun					      "sdmmc4_dat6_paa6",
244*4882a593Smuzhiyun					      "sdmmc4_dat7_paa7";
245*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
246*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
248*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
249*4882a593Smuzhiyun			};
250*4882a593Smuzhiyun			pwr_i2c_scl_pz6 {
251*4882a593Smuzhiyun				nvidia,pins = "pwr_i2c_scl_pz6",
252*4882a593Smuzhiyun					      "pwr_i2c_sda_pz7";
253*4882a593Smuzhiyun				nvidia,function = "i2cpwr";
254*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
256*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
257*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
258*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
259*4882a593Smuzhiyun			};
260*4882a593Smuzhiyun			jtag_rtck {
261*4882a593Smuzhiyun				nvidia,pins = "jtag_rtck";
262*4882a593Smuzhiyun				nvidia,function = "rtck";
263*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
264*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
265*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
266*4882a593Smuzhiyun			};
267*4882a593Smuzhiyun			clk_32k_in {
268*4882a593Smuzhiyun				nvidia,pins = "clk_32k_in";
269*4882a593Smuzhiyun				nvidia,function = "clk";
270*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
271*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
272*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
273*4882a593Smuzhiyun			};
274*4882a593Smuzhiyun			core_pwr_req {
275*4882a593Smuzhiyun				nvidia,pins = "core_pwr_req";
276*4882a593Smuzhiyun				nvidia,function = "pwron";
277*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
278*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
279*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun			cpu_pwr_req {
282*4882a593Smuzhiyun				nvidia,pins = "cpu_pwr_req";
283*4882a593Smuzhiyun				nvidia,function = "cpu";
284*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
285*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
287*4882a593Smuzhiyun			};
288*4882a593Smuzhiyun			pwr_int_n {
289*4882a593Smuzhiyun				nvidia,pins = "pwr_int_n";
290*4882a593Smuzhiyun				nvidia,function = "pmi";
291*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
292*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
293*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
294*4882a593Smuzhiyun			};
295*4882a593Smuzhiyun			reset_out_n {
296*4882a593Smuzhiyun				nvidia,pins = "reset_out_n";
297*4882a593Smuzhiyun				nvidia,function = "reset_out_n";
298*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
299*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun			clk3_out_pee0 {
303*4882a593Smuzhiyun				nvidia,pins = "clk3_out_pee0";
304*4882a593Smuzhiyun				nvidia,function = "extperiph3";
305*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
306*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun			dap4_din_pp5 {
310*4882a593Smuzhiyun				nvidia,pins = "dap4_din_pp5";
311*4882a593Smuzhiyun				nvidia,function = "i2s3";
312*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
313*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
315*4882a593Smuzhiyun			};
316*4882a593Smuzhiyun			dap4_dout_pp6 {
317*4882a593Smuzhiyun				nvidia,pins = "dap4_dout_pp6",
318*4882a593Smuzhiyun					      "dap4_fs_pp4",
319*4882a593Smuzhiyun					      "dap4_sclk_pp7";
320*4882a593Smuzhiyun				nvidia,function = "i2s3";
321*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
322*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
324*4882a593Smuzhiyun			};
325*4882a593Smuzhiyun			gen1_i2c_sda_pc5 {
326*4882a593Smuzhiyun				nvidia,pins = "gen1_i2c_sda_pc5",
327*4882a593Smuzhiyun					      "gen1_i2c_scl_pc4";
328*4882a593Smuzhiyun				nvidia,function = "i2c1";
329*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
330*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
332*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
333*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun			uart2_cts_n_pj5 {
336*4882a593Smuzhiyun				nvidia,pins = "uart2_cts_n_pj5";
337*4882a593Smuzhiyun				nvidia,function = "uartb";
338*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
341*4882a593Smuzhiyun			};
342*4882a593Smuzhiyun			uart2_rts_n_pj6 {
343*4882a593Smuzhiyun				nvidia,pins = "uart2_rts_n_pj6";
344*4882a593Smuzhiyun				nvidia,function = "uartb";
345*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
346*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
348*4882a593Smuzhiyun			};
349*4882a593Smuzhiyun			uart2_rxd_pc3 {
350*4882a593Smuzhiyun				nvidia,pins = "uart2_rxd_pc3";
351*4882a593Smuzhiyun				nvidia,function = "irda";
352*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
353*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
354*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
355*4882a593Smuzhiyun			};
356*4882a593Smuzhiyun			uart2_txd_pc2 {
357*4882a593Smuzhiyun				nvidia,pins = "uart2_txd_pc2";
358*4882a593Smuzhiyun				nvidia,function = "irda";
359*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
360*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
361*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
362*4882a593Smuzhiyun			};
363*4882a593Smuzhiyun			uart3_cts_n_pa1 {
364*4882a593Smuzhiyun				nvidia,pins = "uart3_cts_n_pa1",
365*4882a593Smuzhiyun					      "uart3_rxd_pw7";
366*4882a593Smuzhiyun				nvidia,function = "uartc";
367*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
368*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
369*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
370*4882a593Smuzhiyun			};
371*4882a593Smuzhiyun			uart3_rts_n_pc0 {
372*4882a593Smuzhiyun				nvidia,pins = "uart3_rts_n_pc0",
373*4882a593Smuzhiyun					      "uart3_txd_pw6";
374*4882a593Smuzhiyun				nvidia,function = "uartc";
375*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
376*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
378*4882a593Smuzhiyun			};
379*4882a593Smuzhiyun			hdmi_cec_pee3 {
380*4882a593Smuzhiyun				nvidia,pins = "hdmi_cec_pee3";
381*4882a593Smuzhiyun				nvidia,function = "cec";
382*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
385*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
386*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun			hdmi_int_pn7 {
389*4882a593Smuzhiyun				nvidia,pins = "hdmi_int_pn7";
390*4882a593Smuzhiyun				nvidia,function = "rsvd1";
391*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
392*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
393*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394*4882a593Smuzhiyun			};
395*4882a593Smuzhiyun			ddc_scl_pv4 {
396*4882a593Smuzhiyun				nvidia,pins = "ddc_scl_pv4",
397*4882a593Smuzhiyun					      "ddc_sda_pv5";
398*4882a593Smuzhiyun				nvidia,function = "i2c4";
399*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
400*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
401*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
402*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
403*4882a593Smuzhiyun				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
404*4882a593Smuzhiyun			};
405*4882a593Smuzhiyun			pj7 {
406*4882a593Smuzhiyun				nvidia,pins = "pj7",
407*4882a593Smuzhiyun					      "pk7";
408*4882a593Smuzhiyun				nvidia,function = "uartd";
409*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
410*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
411*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
412*4882a593Smuzhiyun			};
413*4882a593Smuzhiyun			pb0 {
414*4882a593Smuzhiyun				nvidia,pins = "pb0",
415*4882a593Smuzhiyun					      "pb1";
416*4882a593Smuzhiyun				nvidia,function = "uartd";
417*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
418*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
419*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
420*4882a593Smuzhiyun			};
421*4882a593Smuzhiyun			ph0 {
422*4882a593Smuzhiyun				nvidia,pins = "ph0";
423*4882a593Smuzhiyun				nvidia,function = "pwm0";
424*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
425*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
426*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
427*4882a593Smuzhiyun			};
428*4882a593Smuzhiyun			kb_row10_ps2 {
429*4882a593Smuzhiyun				nvidia,pins = "kb_row10_ps2";
430*4882a593Smuzhiyun				nvidia,function = "uarta";
431*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
432*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
433*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
434*4882a593Smuzhiyun			};
435*4882a593Smuzhiyun			kb_row9_ps1 {
436*4882a593Smuzhiyun				nvidia,pins = "kb_row9_ps1";
437*4882a593Smuzhiyun				nvidia,function = "uarta";
438*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
439*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
440*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
441*4882a593Smuzhiyun			};
442*4882a593Smuzhiyun			kb_row6_pr6 {
443*4882a593Smuzhiyun				nvidia,pins = "kb_row6_pr6";
444*4882a593Smuzhiyun				nvidia,function = "displaya_alt";
445*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
446*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
447*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
448*4882a593Smuzhiyun			};
449*4882a593Smuzhiyun			usb_vbus_en0_pn4 {
450*4882a593Smuzhiyun				nvidia,pins = "usb_vbus_en0_pn4",
451*4882a593Smuzhiyun					      "usb_vbus_en1_pn5";
452*4882a593Smuzhiyun				nvidia,function = "usb";
453*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
454*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
455*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
456*4882a593Smuzhiyun				nvidia,lock = <TEGRA_PIN_DISABLE>;
457*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
458*4882a593Smuzhiyun			};
459*4882a593Smuzhiyun			drive_sdio1 {
460*4882a593Smuzhiyun				nvidia,pins = "drive_sdio1";
461*4882a593Smuzhiyun				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
462*4882a593Smuzhiyun				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
463*4882a593Smuzhiyun				nvidia,pull-down-strength = <32>;
464*4882a593Smuzhiyun				nvidia,pull-up-strength = <42>;
465*4882a593Smuzhiyun				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
466*4882a593Smuzhiyun				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
467*4882a593Smuzhiyun			};
468*4882a593Smuzhiyun			drive_sdio3 {
469*4882a593Smuzhiyun				nvidia,pins = "drive_sdio3";
470*4882a593Smuzhiyun				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
471*4882a593Smuzhiyun				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
472*4882a593Smuzhiyun				nvidia,pull-down-strength = <20>;
473*4882a593Smuzhiyun				nvidia,pull-up-strength = <36>;
474*4882a593Smuzhiyun				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
475*4882a593Smuzhiyun				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
476*4882a593Smuzhiyun			};
477*4882a593Smuzhiyun			drive_gma {
478*4882a593Smuzhiyun				nvidia,pins = "drive_gma";
479*4882a593Smuzhiyun				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
480*4882a593Smuzhiyun				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
481*4882a593Smuzhiyun				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
482*4882a593Smuzhiyun				nvidia,pull-down-strength = <1>;
483*4882a593Smuzhiyun				nvidia,pull-up-strength = <2>;
484*4882a593Smuzhiyun				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
485*4882a593Smuzhiyun				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
486*4882a593Smuzhiyun				nvidia,drive-type = <1>;
487*4882a593Smuzhiyun			};
488*4882a593Smuzhiyun			als_irq_l {
489*4882a593Smuzhiyun				nvidia,pins = "gpio_x3_aud_px3";
490*4882a593Smuzhiyun				nvidia,function = "gmi";
491*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
493*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494*4882a593Smuzhiyun			};
495*4882a593Smuzhiyun			codec_irq_l {
496*4882a593Smuzhiyun				nvidia,pins = "ph4";
497*4882a593Smuzhiyun				nvidia,function = "gmi";
498*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
499*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
500*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
501*4882a593Smuzhiyun			};
502*4882a593Smuzhiyun			lcd_bl_en {
503*4882a593Smuzhiyun				nvidia,pins = "ph2";
504*4882a593Smuzhiyun				nvidia,function = "gmi";
505*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
506*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
507*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
508*4882a593Smuzhiyun			};
509*4882a593Smuzhiyun			touch_irq_l {
510*4882a593Smuzhiyun				nvidia,pins = "gpio_w3_aud_pw3";
511*4882a593Smuzhiyun				nvidia,function = "spi6";
512*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
514*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515*4882a593Smuzhiyun			};
516*4882a593Smuzhiyun			tpm_davint_l {
517*4882a593Smuzhiyun				nvidia,pins = "ph6";
518*4882a593Smuzhiyun				nvidia,function = "gmi";
519*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
520*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
521*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522*4882a593Smuzhiyun			};
523*4882a593Smuzhiyun			ts_irq_l {
524*4882a593Smuzhiyun				nvidia,pins = "pk2";
525*4882a593Smuzhiyun				nvidia,function = "gmi";
526*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
527*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
528*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529*4882a593Smuzhiyun			};
530*4882a593Smuzhiyun			ts_reset_l {
531*4882a593Smuzhiyun				nvidia,pins = "pk4";
532*4882a593Smuzhiyun				nvidia,function = "gmi";
533*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
534*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
535*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
536*4882a593Smuzhiyun			};
537*4882a593Smuzhiyun			ts_shdn_l {
538*4882a593Smuzhiyun				nvidia,pins = "pk1";
539*4882a593Smuzhiyun				nvidia,function = "gmi";
540*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
541*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
542*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
543*4882a593Smuzhiyun			};
544*4882a593Smuzhiyun			ph7 {
545*4882a593Smuzhiyun				nvidia,pins = "ph7";
546*4882a593Smuzhiyun				nvidia,function = "gmi";
547*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
548*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
549*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550*4882a593Smuzhiyun			};
551*4882a593Smuzhiyun			kb_col0_ap {
552*4882a593Smuzhiyun				nvidia,pins = "kb_col0_pq0";
553*4882a593Smuzhiyun				nvidia,function = "rsvd4";
554*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
555*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
556*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
557*4882a593Smuzhiyun			};
558*4882a593Smuzhiyun			lid_open {
559*4882a593Smuzhiyun				nvidia,pins = "kb_row4_pr4";
560*4882a593Smuzhiyun				nvidia,function = "rsvd3";
561*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
562*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
563*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
564*4882a593Smuzhiyun			};
565*4882a593Smuzhiyun			en_vdd_sd {
566*4882a593Smuzhiyun				nvidia,pins = "kb_row0_pr0";
567*4882a593Smuzhiyun				nvidia,function = "rsvd4";
568*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
569*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
570*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
571*4882a593Smuzhiyun			};
572*4882a593Smuzhiyun			ac_ok {
573*4882a593Smuzhiyun				nvidia,pins = "pj0";
574*4882a593Smuzhiyun				nvidia,function = "gmi";
575*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
576*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
577*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
578*4882a593Smuzhiyun			};
579*4882a593Smuzhiyun			sensor_irq_l {
580*4882a593Smuzhiyun				nvidia,pins = "pi6";
581*4882a593Smuzhiyun				nvidia,function = "gmi";
582*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
583*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
584*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
585*4882a593Smuzhiyun			};
586*4882a593Smuzhiyun			wifi_en {
587*4882a593Smuzhiyun				nvidia,pins = "gpio_x7_aud_px7";
588*4882a593Smuzhiyun				nvidia,function = "rsvd4";
589*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
590*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
591*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
592*4882a593Smuzhiyun			};
593*4882a593Smuzhiyun			wifi_rst_l {
594*4882a593Smuzhiyun				nvidia,pins = "clk2_req_pcc5";
595*4882a593Smuzhiyun				nvidia,function = "dap";
596*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
597*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
598*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
599*4882a593Smuzhiyun			};
600*4882a593Smuzhiyun			hp_det_l {
601*4882a593Smuzhiyun				nvidia,pins = "ulpi_data1_po2";
602*4882a593Smuzhiyun				nvidia,function = "spi3";
603*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
604*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
605*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
606*4882a593Smuzhiyun			};
607*4882a593Smuzhiyun		};
608*4882a593Smuzhiyun	};
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun	serial@70006000 {
611*4882a593Smuzhiyun		status = "okay";
612*4882a593Smuzhiyun	};
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun	pwm@7000a000 {
615*4882a593Smuzhiyun		status = "okay";
616*4882a593Smuzhiyun	};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun	i2c@7000c000 {
619*4882a593Smuzhiyun		status = "okay";
620*4882a593Smuzhiyun		clock-frequency = <100000>;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun		acodec: audio-codec@10 {
623*4882a593Smuzhiyun			compatible = "maxim,max98090";
624*4882a593Smuzhiyun			reg = <0x10>;
625*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
626*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
627*4882a593Smuzhiyun		};
628*4882a593Smuzhiyun	};
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun	i2c@7000c400 {
631*4882a593Smuzhiyun		status = "okay";
632*4882a593Smuzhiyun		clock-frequency = <100000>;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun		trackpad@4b {
635*4882a593Smuzhiyun			compatible = "atmel,maxtouch";
636*4882a593Smuzhiyun			reg = <0x4b>;
637*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
638*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
639*4882a593Smuzhiyun			linux,gpio-keymap = <0 0 0 BTN_LEFT>;
640*4882a593Smuzhiyun		};
641*4882a593Smuzhiyun	};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun	i2c@7000c500 {
644*4882a593Smuzhiyun		status = "okay";
645*4882a593Smuzhiyun		clock-frequency = <100000>;
646*4882a593Smuzhiyun	};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun	hdmi_ddc: i2c@7000c700 {
649*4882a593Smuzhiyun		status = "okay";
650*4882a593Smuzhiyun		clock-frequency = <100000>;
651*4882a593Smuzhiyun	};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun	i2c@7000d000 {
654*4882a593Smuzhiyun		status = "okay";
655*4882a593Smuzhiyun		clock-frequency = <400000>;
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun		pmic: pmic@40 {
658*4882a593Smuzhiyun			compatible = "ams,as3722";
659*4882a593Smuzhiyun			reg = <0x40>;
660*4882a593Smuzhiyun			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun			ams,system-power-controller;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun			#interrupt-cells = <2>;
665*4882a593Smuzhiyun			interrupt-controller;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun			gpio-controller;
668*4882a593Smuzhiyun			#gpio-cells = <2>;
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun			pinctrl-names = "default";
671*4882a593Smuzhiyun			pinctrl-0 = <&as3722_default>;
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun			as3722_default: pinmux {
674*4882a593Smuzhiyun				gpio0 {
675*4882a593Smuzhiyun					pins = "gpio0";
676*4882a593Smuzhiyun					function = "gpio";
677*4882a593Smuzhiyun					bias-pull-down;
678*4882a593Smuzhiyun				};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun				gpio1_2_4_7 {
681*4882a593Smuzhiyun					pins = "gpio1", "gpio2", "gpio4", "gpio7";
682*4882a593Smuzhiyun					function = "gpio";
683*4882a593Smuzhiyun					bias-pull-up;
684*4882a593Smuzhiyun				};
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun				gpio3_6 {
687*4882a593Smuzhiyun					pins = "gpio3", "gpio6";
688*4882a593Smuzhiyun					bias-high-impedance;
689*4882a593Smuzhiyun				};
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun				gpio5 {
692*4882a593Smuzhiyun					pins = "gpio5";
693*4882a593Smuzhiyun					function = "clk32k-out";
694*4882a593Smuzhiyun				};
695*4882a593Smuzhiyun			};
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun			regulators {
698*4882a593Smuzhiyun				vsup-sd2-supply = <&vdd_5v0_sys>;
699*4882a593Smuzhiyun				vsup-sd3-supply = <&vdd_5v0_sys>;
700*4882a593Smuzhiyun				vsup-sd4-supply = <&vdd_5v0_sys>;
701*4882a593Smuzhiyun				vsup-sd5-supply = <&vdd_5v0_sys>;
702*4882a593Smuzhiyun				vin-ldo0-supply = <&vdd_1v35_lp0>;
703*4882a593Smuzhiyun				vin-ldo1-6-supply = <&vdd_3v3_run>;
704*4882a593Smuzhiyun				vin-ldo2-5-7-supply = <&vddio_1v8>;
705*4882a593Smuzhiyun				vin-ldo3-4-supply = <&vdd_3v3_sys>;
706*4882a593Smuzhiyun				vin-ldo9-10-supply = <&vdd_5v0_sys>;
707*4882a593Smuzhiyun				vin-ldo11-supply = <&vdd_3v3_run>;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun				sd0 {
710*4882a593Smuzhiyun					regulator-name = "+VDD_CPU_AP";
711*4882a593Smuzhiyun					regulator-min-microvolt = <700000>;
712*4882a593Smuzhiyun					regulator-max-microvolt = <1400000>;
713*4882a593Smuzhiyun					regulator-min-microamp = <3500000>;
714*4882a593Smuzhiyun					regulator-max-microamp = <3500000>;
715*4882a593Smuzhiyun					regulator-always-on;
716*4882a593Smuzhiyun					regulator-boot-on;
717*4882a593Smuzhiyun					ams,ext-control = <2>;
718*4882a593Smuzhiyun				};
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun				sd1 {
721*4882a593Smuzhiyun					regulator-name = "+VDD_CORE";
722*4882a593Smuzhiyun					regulator-min-microvolt = <700000>;
723*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
724*4882a593Smuzhiyun					regulator-min-microamp = <2500000>;
725*4882a593Smuzhiyun					regulator-max-microamp = <2500000>;
726*4882a593Smuzhiyun					regulator-always-on;
727*4882a593Smuzhiyun					regulator-boot-on;
728*4882a593Smuzhiyun					ams,ext-control = <1>;
729*4882a593Smuzhiyun				};
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun				vdd_1v35_lp0: sd2 {
732*4882a593Smuzhiyun					regulator-name = "+1.35V_LP0(sd2)";
733*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
734*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
735*4882a593Smuzhiyun					regulator-always-on;
736*4882a593Smuzhiyun					regulator-boot-on;
737*4882a593Smuzhiyun				};
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun				sd3 {
740*4882a593Smuzhiyun					regulator-name = "+1.35V_LP0(sd3)";
741*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
742*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
743*4882a593Smuzhiyun					regulator-always-on;
744*4882a593Smuzhiyun					regulator-boot-on;
745*4882a593Smuzhiyun				};
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun				vdd_1v05_run: sd4 {
748*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN";
749*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
750*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
751*4882a593Smuzhiyun				};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun				vddio_1v8: sd5 {
754*4882a593Smuzhiyun					regulator-name = "+1.8V_VDDIO";
755*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
756*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
757*4882a593Smuzhiyun					regulator-boot-on;
758*4882a593Smuzhiyun					regulator-always-on;
759*4882a593Smuzhiyun				};
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun				vdd_gpu: sd6 {
762*4882a593Smuzhiyun					regulator-name = "+VDD_GPU_AP";
763*4882a593Smuzhiyun					regulator-min-microvolt = <650000>;
764*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
765*4882a593Smuzhiyun					regulator-min-microamp = <3500000>;
766*4882a593Smuzhiyun					regulator-max-microamp = <3500000>;
767*4882a593Smuzhiyun					regulator-boot-on;
768*4882a593Smuzhiyun					regulator-always-on;
769*4882a593Smuzhiyun				};
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun				avdd_1v05_run: ldo0 {
772*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN_AVDD";
773*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
774*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
775*4882a593Smuzhiyun					regulator-boot-on;
776*4882a593Smuzhiyun					regulator-always-on;
777*4882a593Smuzhiyun					ams,ext-control = <1>;
778*4882a593Smuzhiyun				};
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun				ldo1 {
781*4882a593Smuzhiyun					regulator-name = "+1.8V_RUN_CAM";
782*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
783*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
784*4882a593Smuzhiyun				};
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun				ldo2 {
787*4882a593Smuzhiyun					regulator-name = "+1.2V_GEN_AVDD";
788*4882a593Smuzhiyun					regulator-min-microvolt = <1200000>;
789*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
790*4882a593Smuzhiyun					regulator-boot-on;
791*4882a593Smuzhiyun					regulator-always-on;
792*4882a593Smuzhiyun				};
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun				ldo3 {
795*4882a593Smuzhiyun					regulator-name = "+1.00V_LP0_VDD_RTC";
796*4882a593Smuzhiyun					regulator-min-microvolt = <1000000>;
797*4882a593Smuzhiyun					regulator-max-microvolt = <1000000>;
798*4882a593Smuzhiyun					regulator-boot-on;
799*4882a593Smuzhiyun					regulator-always-on;
800*4882a593Smuzhiyun					ams,enable-tracking;
801*4882a593Smuzhiyun				};
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun				vdd_run_cam: ldo4 {
804*4882a593Smuzhiyun					regulator-name = "+3.3V_RUN_CAM";
805*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
806*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
807*4882a593Smuzhiyun				};
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun				ldo5 {
810*4882a593Smuzhiyun					regulator-name = "+1.2V_RUN_CAM_FRONT";
811*4882a593Smuzhiyun					regulator-min-microvolt = <1200000>;
812*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
813*4882a593Smuzhiyun				};
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun				vddio_sdmmc3: ldo6 {
816*4882a593Smuzhiyun					regulator-name = "+VDDIO_SDMMC3";
817*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
818*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
819*4882a593Smuzhiyun				};
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun				ldo7 {
822*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN_CAM_REAR";
823*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
824*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
825*4882a593Smuzhiyun				};
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun				ldo9 {
828*4882a593Smuzhiyun					regulator-name = "+2.8V_RUN_TOUCH";
829*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
830*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
831*4882a593Smuzhiyun				};
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun				ldo10 {
834*4882a593Smuzhiyun					regulator-name = "+2.8V_RUN_CAM_AF";
835*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
836*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
837*4882a593Smuzhiyun				};
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun				ldo11 {
840*4882a593Smuzhiyun					regulator-name = "+1.8V_RUN_VPP_FUSE";
841*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
842*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
843*4882a593Smuzhiyun				};
844*4882a593Smuzhiyun			};
845*4882a593Smuzhiyun		};
846*4882a593Smuzhiyun	};
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun	spi@7000d400 {
849*4882a593Smuzhiyun		status = "okay";
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun		cros_ec: cros-ec@0 {
852*4882a593Smuzhiyun			compatible = "google,cros-ec-spi";
853*4882a593Smuzhiyun			spi-max-frequency = <4000000>;
854*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
855*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
856*4882a593Smuzhiyun			reg = <0>;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun			google,cros-ec-spi-msg-delay = <2000>;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun			i2c-tunnel {
861*4882a593Smuzhiyun				compatible = "google,cros-ec-i2c-tunnel";
862*4882a593Smuzhiyun				#address-cells = <1>;
863*4882a593Smuzhiyun				#size-cells = <0>;
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun				google,remote-bus = <0>;
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun				charger: bq24735@9 {
868*4882a593Smuzhiyun					compatible = "ti,bq24735";
869*4882a593Smuzhiyun					reg = <0x9>;
870*4882a593Smuzhiyun					interrupt-parent = <&gpio>;
871*4882a593Smuzhiyun					interrupts = <TEGRA_GPIO(J, 0)
872*4882a593Smuzhiyun							IRQ_TYPE_EDGE_BOTH>;
873*4882a593Smuzhiyun					ti,ac-detect-gpios = <&gpio
874*4882a593Smuzhiyun							TEGRA_GPIO(J, 0)
875*4882a593Smuzhiyun							GPIO_ACTIVE_HIGH>;
876*4882a593Smuzhiyun				};
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun				battery: sbs-battery@b {
879*4882a593Smuzhiyun					compatible = "sbs,sbs-battery";
880*4882a593Smuzhiyun					reg = <0xb>;
881*4882a593Smuzhiyun					sbs,i2c-retry-count = <2>;
882*4882a593Smuzhiyun					sbs,poll-retry-count = <1>;
883*4882a593Smuzhiyun				};
884*4882a593Smuzhiyun			};
885*4882a593Smuzhiyun		};
886*4882a593Smuzhiyun	};
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun	spi@7000da00 {
889*4882a593Smuzhiyun		status = "okay";
890*4882a593Smuzhiyun		spi-max-frequency = <25000000>;
891*4882a593Smuzhiyun		spi-flash@0 {
892*4882a593Smuzhiyun			compatible = "winbond,w25q32dw", "jedec,spi-nor";
893*4882a593Smuzhiyun			reg = <0>;
894*4882a593Smuzhiyun			spi-max-frequency = <20000000>;
895*4882a593Smuzhiyun		};
896*4882a593Smuzhiyun	};
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun	pmc@7000e400 {
899*4882a593Smuzhiyun		nvidia,invert-interrupt;
900*4882a593Smuzhiyun		nvidia,suspend-mode = <1>;
901*4882a593Smuzhiyun		nvidia,cpu-pwr-good-time = <500>;
902*4882a593Smuzhiyun		nvidia,cpu-pwr-off-time = <300>;
903*4882a593Smuzhiyun		nvidia,core-pwr-good-time = <641 3845>;
904*4882a593Smuzhiyun		nvidia,core-pwr-off-time = <61036>;
905*4882a593Smuzhiyun		nvidia,core-power-req-active-high;
906*4882a593Smuzhiyun		nvidia,sys-clock-req-active-high;
907*4882a593Smuzhiyun	};
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun	hda@70030000 {
910*4882a593Smuzhiyun		status = "okay";
911*4882a593Smuzhiyun	};
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun	usb@70090000 {
914*4882a593Smuzhiyun		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
915*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
916*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
917*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
918*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
919*4882a593Smuzhiyun		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun		avddio-pex-supply = <&vdd_1v05_run>;
922*4882a593Smuzhiyun		dvddio-pex-supply = <&vdd_1v05_run>;
923*4882a593Smuzhiyun		avdd-usb-supply = <&vdd_3v3_lp0>;
924*4882a593Smuzhiyun		avdd-pll-utmip-supply = <&vddio_1v8>;
925*4882a593Smuzhiyun		avdd-pll-erefe-supply = <&avdd_1v05_run>;
926*4882a593Smuzhiyun		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
927*4882a593Smuzhiyun		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
928*4882a593Smuzhiyun		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun		status = "okay";
931*4882a593Smuzhiyun	};
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun	padctl@7009f000 {
934*4882a593Smuzhiyun		avdd-pll-utmip-supply = <&vddio_1v8>;
935*4882a593Smuzhiyun		avdd-pll-erefe-supply = <&avdd_1v05_run>;
936*4882a593Smuzhiyun		avdd-pex-pll-supply = <&vdd_1v05_run>;
937*4882a593Smuzhiyun		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun		pads {
940*4882a593Smuzhiyun			usb2 {
941*4882a593Smuzhiyun				status = "okay";
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun				lanes {
944*4882a593Smuzhiyun					usb2-0 {
945*4882a593Smuzhiyun						nvidia,function = "xusb";
946*4882a593Smuzhiyun						status = "okay";
947*4882a593Smuzhiyun					};
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun					usb2-1 {
950*4882a593Smuzhiyun						nvidia,function = "xusb";
951*4882a593Smuzhiyun						status = "okay";
952*4882a593Smuzhiyun					};
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun					usb2-2 {
955*4882a593Smuzhiyun						nvidia,function = "xusb";
956*4882a593Smuzhiyun						status = "okay";
957*4882a593Smuzhiyun					};
958*4882a593Smuzhiyun				};
959*4882a593Smuzhiyun			};
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun			pcie {
962*4882a593Smuzhiyun				status = "okay";
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun				lanes {
965*4882a593Smuzhiyun					pcie-0 {
966*4882a593Smuzhiyun						nvidia,function = "usb3-ss";
967*4882a593Smuzhiyun						status = "okay";
968*4882a593Smuzhiyun					};
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun					pcie-1 {
971*4882a593Smuzhiyun						nvidia,function = "usb3-ss";
972*4882a593Smuzhiyun						status = "okay";
973*4882a593Smuzhiyun					};
974*4882a593Smuzhiyun				};
975*4882a593Smuzhiyun			};
976*4882a593Smuzhiyun		};
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun		ports {
979*4882a593Smuzhiyun			usb2-0 {
980*4882a593Smuzhiyun				status = "okay";
981*4882a593Smuzhiyun				mode = "otg";
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun				vbus-supply = <&vdd_usb1_vbus>;
984*4882a593Smuzhiyun			};
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun			usb2-1 {
987*4882a593Smuzhiyun				status = "okay";
988*4882a593Smuzhiyun				mode = "host";
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun				vbus-supply = <&vdd_run_cam>;
991*4882a593Smuzhiyun			};
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun			usb2-2 {
994*4882a593Smuzhiyun				status = "okay";
995*4882a593Smuzhiyun				mode = "host";
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun				vbus-supply = <&vdd_usb3_vbus>;
998*4882a593Smuzhiyun			};
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun			usb3-0 {
1001*4882a593Smuzhiyun				nvidia,usb2-companion = <0>;
1002*4882a593Smuzhiyun				status = "okay";
1003*4882a593Smuzhiyun			};
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun			usb3-1 {
1006*4882a593Smuzhiyun				nvidia,usb2-companion = <2>;
1007*4882a593Smuzhiyun				status = "okay";
1008*4882a593Smuzhiyun			};
1009*4882a593Smuzhiyun		};
1010*4882a593Smuzhiyun	};
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun	mmc@700b0400 {
1013*4882a593Smuzhiyun		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1014*4882a593Smuzhiyun		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1015*4882a593Smuzhiyun		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1016*4882a593Smuzhiyun		status = "okay";
1017*4882a593Smuzhiyun		bus-width = <4>;
1018*4882a593Smuzhiyun		vqmmc-supply = <&vddio_sdmmc3>;
1019*4882a593Smuzhiyun	};
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun	mmc@700b0600 {
1022*4882a593Smuzhiyun		status = "okay";
1023*4882a593Smuzhiyun		bus-width = <8>;
1024*4882a593Smuzhiyun		non-removable;
1025*4882a593Smuzhiyun	};
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun	ahub@70300000 {
1028*4882a593Smuzhiyun		i2s@70301100 {
1029*4882a593Smuzhiyun			status = "okay";
1030*4882a593Smuzhiyun		};
1031*4882a593Smuzhiyun	};
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun	usb@7d000000 {
1034*4882a593Smuzhiyun		status = "okay";
1035*4882a593Smuzhiyun	};
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun	usb-phy@7d000000 {
1038*4882a593Smuzhiyun		status = "okay";
1039*4882a593Smuzhiyun		vbus-supply = <&vdd_usb1_vbus>;
1040*4882a593Smuzhiyun	};
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun	usb@7d004000 {
1043*4882a593Smuzhiyun		status = "okay";
1044*4882a593Smuzhiyun	};
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun	usb-phy@7d004000 {
1047*4882a593Smuzhiyun		status = "okay";
1048*4882a593Smuzhiyun		vbus-supply = <&vdd_run_cam>;
1049*4882a593Smuzhiyun	};
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun	usb@7d008000 {
1052*4882a593Smuzhiyun		status = "okay";
1053*4882a593Smuzhiyun	};
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun	usb-phy@7d008000 {
1056*4882a593Smuzhiyun		status = "okay";
1057*4882a593Smuzhiyun		vbus-supply = <&vdd_usb3_vbus>;
1058*4882a593Smuzhiyun	};
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun	backlight: backlight {
1061*4882a593Smuzhiyun		compatible = "pwm-backlight";
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1064*4882a593Smuzhiyun		power-supply = <&vdd_led>;
1065*4882a593Smuzhiyun		pwms = <&pwm 1 1000000>;
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
1068*4882a593Smuzhiyun		default-brightness-level = <6>;
1069*4882a593Smuzhiyun	};
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun	clk32k_in: clock@0 {
1072*4882a593Smuzhiyun		compatible = "fixed-clock";
1073*4882a593Smuzhiyun		clock-frequency = <32768>;
1074*4882a593Smuzhiyun		#clock-cells = <0>;
1075*4882a593Smuzhiyun	};
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun	gpio-keys {
1078*4882a593Smuzhiyun		compatible = "gpio-keys";
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun		power {
1081*4882a593Smuzhiyun			label = "Power";
1082*4882a593Smuzhiyun			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1083*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
1084*4882a593Smuzhiyun			debounce-interval = <10>;
1085*4882a593Smuzhiyun			wakeup-source;
1086*4882a593Smuzhiyun		};
1087*4882a593Smuzhiyun	};
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun	vdd_mux: regulator@0 {
1090*4882a593Smuzhiyun		compatible = "regulator-fixed";
1091*4882a593Smuzhiyun		regulator-name = "+VDD_MUX";
1092*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
1093*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
1094*4882a593Smuzhiyun		regulator-always-on;
1095*4882a593Smuzhiyun		regulator-boot-on;
1096*4882a593Smuzhiyun	};
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun	vdd_5v0_sys: regulator@1 {
1099*4882a593Smuzhiyun		compatible = "regulator-fixed";
1100*4882a593Smuzhiyun		regulator-name = "+5V_SYS";
1101*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1102*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1103*4882a593Smuzhiyun		regulator-always-on;
1104*4882a593Smuzhiyun		regulator-boot-on;
1105*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
1106*4882a593Smuzhiyun	};
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun	vdd_3v3_sys: regulator@2 {
1109*4882a593Smuzhiyun		compatible = "regulator-fixed";
1110*4882a593Smuzhiyun		regulator-name = "+3.3V_SYS";
1111*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1112*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1113*4882a593Smuzhiyun		regulator-always-on;
1114*4882a593Smuzhiyun		regulator-boot-on;
1115*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
1116*4882a593Smuzhiyun	};
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun	vdd_3v3_run: regulator@3 {
1119*4882a593Smuzhiyun		compatible = "regulator-fixed";
1120*4882a593Smuzhiyun		regulator-name = "+3.3V_RUN";
1121*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1122*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1123*4882a593Smuzhiyun		regulator-always-on;
1124*4882a593Smuzhiyun		regulator-boot-on;
1125*4882a593Smuzhiyun		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1126*4882a593Smuzhiyun		enable-active-high;
1127*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_sys>;
1128*4882a593Smuzhiyun	};
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun	vdd_3v3_hdmi: regulator@4 {
1131*4882a593Smuzhiyun		compatible = "regulator-fixed";
1132*4882a593Smuzhiyun		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1133*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1134*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1135*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_run>;
1136*4882a593Smuzhiyun	};
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun	vdd_led: regulator@5 {
1139*4882a593Smuzhiyun		compatible = "regulator-fixed";
1140*4882a593Smuzhiyun		regulator-name = "+VDD_LED";
1141*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1142*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1143*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1144*4882a593Smuzhiyun		enable-active-high;
1145*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
1146*4882a593Smuzhiyun	};
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun	vdd_5v0_ts: regulator@6 {
1149*4882a593Smuzhiyun		compatible = "regulator-fixed";
1150*4882a593Smuzhiyun		regulator-name = "+5V_VDD_TS_SW";
1151*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1152*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1153*4882a593Smuzhiyun		regulator-boot-on;
1154*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1155*4882a593Smuzhiyun		enable-active-high;
1156*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1157*4882a593Smuzhiyun	};
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun	vdd_usb1_vbus: regulator@7 {
1160*4882a593Smuzhiyun		compatible = "regulator-fixed";
1161*4882a593Smuzhiyun		regulator-name = "+5V_USB_HS";
1162*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1163*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1164*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1165*4882a593Smuzhiyun		enable-active-high;
1166*4882a593Smuzhiyun		gpio-open-drain;
1167*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1168*4882a593Smuzhiyun	};
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun	vdd_usb3_vbus: regulator@8 {
1171*4882a593Smuzhiyun		compatible = "regulator-fixed";
1172*4882a593Smuzhiyun		regulator-name = "+5V_USB_SS";
1173*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1174*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1175*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1176*4882a593Smuzhiyun		enable-active-high;
1177*4882a593Smuzhiyun		gpio-open-drain;
1178*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1179*4882a593Smuzhiyun	};
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun	vdd_3v3_panel: regulator@9 {
1182*4882a593Smuzhiyun		compatible = "regulator-fixed";
1183*4882a593Smuzhiyun		regulator-name = "+3.3V_PANEL";
1184*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1185*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1186*4882a593Smuzhiyun		gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1187*4882a593Smuzhiyun		enable-active-high;
1188*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_run>;
1189*4882a593Smuzhiyun	};
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun	vdd_3v3_lp0: regulator@10 {
1192*4882a593Smuzhiyun		compatible = "regulator-fixed";
1193*4882a593Smuzhiyun		regulator-name = "+3.3V_LP0";
1194*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1195*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1196*4882a593Smuzhiyun		/*
1197*4882a593Smuzhiyun		 * TODO: find a way to wire this up with the USB EHCI
1198*4882a593Smuzhiyun		 * controllers so that it can be enabled on demand.
1199*4882a593Smuzhiyun		 */
1200*4882a593Smuzhiyun		regulator-always-on;
1201*4882a593Smuzhiyun		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1202*4882a593Smuzhiyun		enable-active-high;
1203*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_sys>;
1204*4882a593Smuzhiyun	};
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun	vdd_hdmi_pll: regulator@11 {
1207*4882a593Smuzhiyun		compatible = "regulator-fixed";
1208*4882a593Smuzhiyun		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1209*4882a593Smuzhiyun		regulator-min-microvolt = <1050000>;
1210*4882a593Smuzhiyun		regulator-max-microvolt = <1050000>;
1211*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1212*4882a593Smuzhiyun		vin-supply = <&vdd_1v05_run>;
1213*4882a593Smuzhiyun	};
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun	vdd_5v0_hdmi: regulator@12 {
1216*4882a593Smuzhiyun		compatible = "regulator-fixed";
1217*4882a593Smuzhiyun		regulator-name = "+5V_HDMI_CON";
1218*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1219*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1220*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1221*4882a593Smuzhiyun		enable-active-high;
1222*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1223*4882a593Smuzhiyun	};
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun	sound {
1226*4882a593Smuzhiyun		compatible = "nvidia,tegra-audio-max98090-venice2",
1227*4882a593Smuzhiyun			     "nvidia,tegra-audio-max98090";
1228*4882a593Smuzhiyun		nvidia,model = "NVIDIA Tegra Venice2";
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun		nvidia,audio-routing =
1231*4882a593Smuzhiyun			"Headphones", "HPR",
1232*4882a593Smuzhiyun			"Headphones", "HPL",
1233*4882a593Smuzhiyun			"Speakers", "SPKR",
1234*4882a593Smuzhiyun			"Speakers", "SPKL",
1235*4882a593Smuzhiyun			"Mic Jack", "MICBIAS",
1236*4882a593Smuzhiyun			"IN34", "Mic Jack";
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun		nvidia,i2s-controller = <&tegra_i2s1>;
1239*4882a593Smuzhiyun		nvidia,audio-codec = <&acodec>;
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1242*4882a593Smuzhiyun			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1243*4882a593Smuzhiyun			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1244*4882a593Smuzhiyun		clock-names = "pll_a", "pll_a_out0", "mclk";
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
1247*4882a593Smuzhiyun				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1250*4882a593Smuzhiyun					 <&tegra_car TEGRA124_CLK_EXTERN1>;
1251*4882a593Smuzhiyun	};
1252*4882a593Smuzhiyun};
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun#include "cros-ec-keyboard.dtsi"
1255