xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra124-jetson-tk1.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
5*4882a593Smuzhiyun#include "tegra124.dtsi"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "tegra124-jetson-tk1-emc.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "NVIDIA Tegra124 Jetson TK1";
11*4882a593Smuzhiyun	compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	aliases {
14*4882a593Smuzhiyun		rtc0 = "/i2c@7000d000/pmic@40";
15*4882a593Smuzhiyun		rtc1 = "/rtc@7000e000";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun		/* This order keeps the mapping DB9 connector <-> ttyS0 */
18*4882a593Smuzhiyun		serial0 = &uartd;
19*4882a593Smuzhiyun		serial1 = &uarta;
20*4882a593Smuzhiyun		serial2 = &uartb;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	chosen {
24*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	memory@80000000 {
28*4882a593Smuzhiyun		reg = <0x0 0x80000000 0x0 0x80000000>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	pcie@1003000 {
32*4882a593Smuzhiyun		status = "okay";
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		avddio-pex-supply = <&vdd_1v05_run>;
35*4882a593Smuzhiyun		dvddio-pex-supply = <&vdd_1v05_run>;
36*4882a593Smuzhiyun		avdd-pex-pll-supply = <&vdd_1v05_run>;
37*4882a593Smuzhiyun		hvdd-pex-supply = <&vdd_3v3_lp0>;
38*4882a593Smuzhiyun		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
39*4882a593Smuzhiyun		vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
40*4882a593Smuzhiyun		avdd-pll-erefe-supply = <&avdd_1v05_run>;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun		/* Mini PCIe */
43*4882a593Smuzhiyun		pci@1,0 {
44*4882a593Smuzhiyun			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
45*4882a593Smuzhiyun			phy-names = "pcie-0";
46*4882a593Smuzhiyun			status = "okay";
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		/* Gigabit Ethernet */
50*4882a593Smuzhiyun		pci@2,0 {
51*4882a593Smuzhiyun			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
52*4882a593Smuzhiyun			phy-names = "pcie-0";
53*4882a593Smuzhiyun			status = "okay";
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	host1x@50000000 {
58*4882a593Smuzhiyun		hdmi@54280000 {
59*4882a593Smuzhiyun			status = "okay";
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun			hdmi-supply = <&vdd_5v0_hdmi>;
62*4882a593Smuzhiyun			pll-supply = <&vdd_hdmi_pll>;
63*4882a593Smuzhiyun			vdd-supply = <&vdd_3v3_hdmi>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
66*4882a593Smuzhiyun			nvidia,hpd-gpio =
67*4882a593Smuzhiyun				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	cec@70015000 {
72*4882a593Smuzhiyun		status = "okay";
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	gpu@0,57000000 {
76*4882a593Smuzhiyun		/*
77*4882a593Smuzhiyun		 * Node left disabled on purpose - the bootloader will enable
78*4882a593Smuzhiyun		 * it after having set the VPR up
79*4882a593Smuzhiyun		 */
80*4882a593Smuzhiyun		vdd-supply = <&vdd_gpu>;
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	pinmux: pinmux@70000868 {
84*4882a593Smuzhiyun		pinctrl-names = "boot";
85*4882a593Smuzhiyun		pinctrl-0 = <&state_boot>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		state_boot: pinmux {
88*4882a593Smuzhiyun			clk_32k_out_pa0 {
89*4882a593Smuzhiyun				nvidia,pins = "clk_32k_out_pa0";
90*4882a593Smuzhiyun				nvidia,function = "soc";
91*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
92*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
93*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun			uart3_cts_n_pa1 {
96*4882a593Smuzhiyun				nvidia,pins = "uart3_cts_n_pa1";
97*4882a593Smuzhiyun				nvidia,function = "gmi";
98*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
99*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
100*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun			dap2_fs_pa2 {
103*4882a593Smuzhiyun				nvidia,pins = "dap2_fs_pa2";
104*4882a593Smuzhiyun				nvidia,function = "i2s1";
105*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
107*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun			dap2_sclk_pa3 {
110*4882a593Smuzhiyun				nvidia,pins = "dap2_sclk_pa3";
111*4882a593Smuzhiyun				nvidia,function = "i2s1";
112*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
113*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
114*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun			dap2_din_pa4 {
117*4882a593Smuzhiyun				nvidia,pins = "dap2_din_pa4";
118*4882a593Smuzhiyun				nvidia,function = "i2s1";
119*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
120*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
121*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun			dap2_dout_pa5 {
124*4882a593Smuzhiyun				nvidia,pins = "dap2_dout_pa5";
125*4882a593Smuzhiyun				nvidia,function = "i2s1";
126*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
127*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
128*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun			sdmmc3_clk_pa6 {
131*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_clk_pa6";
132*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
133*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
134*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
135*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
136*4882a593Smuzhiyun			};
137*4882a593Smuzhiyun			sdmmc3_cmd_pa7 {
138*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_cmd_pa7";
139*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
140*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
141*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
142*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
143*4882a593Smuzhiyun			};
144*4882a593Smuzhiyun			pb0 {
145*4882a593Smuzhiyun				nvidia,pins = "pb0";
146*4882a593Smuzhiyun				nvidia,function = "uartd";
147*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
148*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
149*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
150*4882a593Smuzhiyun			};
151*4882a593Smuzhiyun			pb1 {
152*4882a593Smuzhiyun				nvidia,pins = "pb1";
153*4882a593Smuzhiyun				nvidia,function = "uartd";
154*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
155*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
156*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
157*4882a593Smuzhiyun			};
158*4882a593Smuzhiyun			sdmmc3_dat3_pb4 {
159*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_dat3_pb4";
160*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
161*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
162*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
163*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
164*4882a593Smuzhiyun			};
165*4882a593Smuzhiyun			sdmmc3_dat2_pb5 {
166*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_dat2_pb5";
167*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
168*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
169*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
170*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun			sdmmc3_dat1_pb6 {
173*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_dat1_pb6";
174*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
175*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
176*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
177*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178*4882a593Smuzhiyun			};
179*4882a593Smuzhiyun			sdmmc3_dat0_pb7 {
180*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_dat0_pb7";
181*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
182*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
183*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
184*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
185*4882a593Smuzhiyun			};
186*4882a593Smuzhiyun			uart3_rts_n_pc0 {
187*4882a593Smuzhiyun				nvidia,pins = "uart3_rts_n_pc0";
188*4882a593Smuzhiyun				nvidia,function = "gmi";
189*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
190*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
191*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
192*4882a593Smuzhiyun			};
193*4882a593Smuzhiyun			uart2_txd_pc2 {
194*4882a593Smuzhiyun				nvidia,pins = "uart2_txd_pc2";
195*4882a593Smuzhiyun				nvidia,function = "irda";
196*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
197*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
198*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
199*4882a593Smuzhiyun			};
200*4882a593Smuzhiyun			uart2_rxd_pc3 {
201*4882a593Smuzhiyun				nvidia,pins = "uart2_rxd_pc3";
202*4882a593Smuzhiyun				nvidia,function = "irda";
203*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
204*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
205*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
206*4882a593Smuzhiyun			};
207*4882a593Smuzhiyun			gen1_i2c_scl_pc4 {
208*4882a593Smuzhiyun				nvidia,pins = "gen1_i2c_scl_pc4";
209*4882a593Smuzhiyun				nvidia,function = "i2c1";
210*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
211*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
212*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
213*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun			gen1_i2c_sda_pc5 {
216*4882a593Smuzhiyun				nvidia,pins = "gen1_i2c_sda_pc5";
217*4882a593Smuzhiyun				nvidia,function = "i2c1";
218*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
220*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
221*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
222*4882a593Smuzhiyun			};
223*4882a593Smuzhiyun			pc7 {
224*4882a593Smuzhiyun				nvidia,pins = "pc7";
225*4882a593Smuzhiyun				nvidia,function = "rsvd1";
226*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
227*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
228*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
229*4882a593Smuzhiyun			};
230*4882a593Smuzhiyun			pg0 {
231*4882a593Smuzhiyun				nvidia,pins = "pg0";
232*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
233*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
234*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
235*4882a593Smuzhiyun			};
236*4882a593Smuzhiyun			pg1 {
237*4882a593Smuzhiyun				nvidia,pins = "pg1";
238*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
239*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
240*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun			pg2 {
243*4882a593Smuzhiyun				nvidia,pins = "pg2";
244*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
246*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun			pg3 {
249*4882a593Smuzhiyun				nvidia,pins = "pg3";
250*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
252*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253*4882a593Smuzhiyun			};
254*4882a593Smuzhiyun			pg4 {
255*4882a593Smuzhiyun				nvidia,pins = "pg4";
256*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
258*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
259*4882a593Smuzhiyun			};
260*4882a593Smuzhiyun			pg5 {
261*4882a593Smuzhiyun				nvidia,pins = "pg5";
262*4882a593Smuzhiyun				nvidia,function = "spi4";
263*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
265*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
266*4882a593Smuzhiyun			};
267*4882a593Smuzhiyun			pg6 {
268*4882a593Smuzhiyun				nvidia,pins = "pg6";
269*4882a593Smuzhiyun				nvidia,function = "spi4";
270*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
271*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
272*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
273*4882a593Smuzhiyun			};
274*4882a593Smuzhiyun			pg7 {
275*4882a593Smuzhiyun				nvidia,pins = "pg7";
276*4882a593Smuzhiyun				nvidia,function = "spi4";
277*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
278*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
279*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun			ph0 {
282*4882a593Smuzhiyun				nvidia,pins = "ph0";
283*4882a593Smuzhiyun				nvidia,function = "gmi";
284*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
285*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
286*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
287*4882a593Smuzhiyun			};
288*4882a593Smuzhiyun			ph1 {
289*4882a593Smuzhiyun				nvidia,pins = "ph1";
290*4882a593Smuzhiyun				nvidia,function = "pwm1";
291*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
292*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
293*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
294*4882a593Smuzhiyun			};
295*4882a593Smuzhiyun			ph2 {
296*4882a593Smuzhiyun				nvidia,pins = "ph2";
297*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
298*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
299*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
300*4882a593Smuzhiyun			};
301*4882a593Smuzhiyun			ph3 {
302*4882a593Smuzhiyun				nvidia,pins = "ph3";
303*4882a593Smuzhiyun				nvidia,function = "gmi";
304*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
305*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
306*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
307*4882a593Smuzhiyun			};
308*4882a593Smuzhiyun			ph4 {
309*4882a593Smuzhiyun				nvidia,pins = "ph4";
310*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
311*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
312*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
313*4882a593Smuzhiyun			};
314*4882a593Smuzhiyun			ph5 {
315*4882a593Smuzhiyun				nvidia,pins = "ph5";
316*4882a593Smuzhiyun				nvidia,function = "rsvd2";
317*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
318*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
319*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
320*4882a593Smuzhiyun			};
321*4882a593Smuzhiyun			ph6 {
322*4882a593Smuzhiyun				nvidia,pins = "ph6";
323*4882a593Smuzhiyun				nvidia,function = "gmi";
324*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
325*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
326*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
327*4882a593Smuzhiyun			};
328*4882a593Smuzhiyun			ph7 {
329*4882a593Smuzhiyun				nvidia,pins = "ph7";
330*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
332*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333*4882a593Smuzhiyun			};
334*4882a593Smuzhiyun			pi0 {
335*4882a593Smuzhiyun				nvidia,pins = "pi0";
336*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
337*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
338*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
339*4882a593Smuzhiyun			};
340*4882a593Smuzhiyun			pi1 {
341*4882a593Smuzhiyun				nvidia,pins = "pi1";
342*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
343*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
344*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
345*4882a593Smuzhiyun			};
346*4882a593Smuzhiyun			pi2 {
347*4882a593Smuzhiyun				nvidia,pins = "pi2";
348*4882a593Smuzhiyun				nvidia,function = "rsvd4";
349*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
350*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
351*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
352*4882a593Smuzhiyun			};
353*4882a593Smuzhiyun			pi3 {
354*4882a593Smuzhiyun				nvidia,pins = "pi3";
355*4882a593Smuzhiyun				nvidia,function = "spi4";
356*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
357*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
358*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
359*4882a593Smuzhiyun			};
360*4882a593Smuzhiyun			pi4 {
361*4882a593Smuzhiyun				nvidia,pins = "pi4";
362*4882a593Smuzhiyun				nvidia,function = "gmi";
363*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
364*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
365*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366*4882a593Smuzhiyun			};
367*4882a593Smuzhiyun			pi5 {
368*4882a593Smuzhiyun				nvidia,pins = "pi5";
369*4882a593Smuzhiyun				nvidia,function = "rsvd2";
370*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
371*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
372*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373*4882a593Smuzhiyun			};
374*4882a593Smuzhiyun			pi6 {
375*4882a593Smuzhiyun				nvidia,pins = "pi6";
376*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
378*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
379*4882a593Smuzhiyun			};
380*4882a593Smuzhiyun			pi7 {
381*4882a593Smuzhiyun				nvidia,pins = "pi7";
382*4882a593Smuzhiyun				nvidia,function = "rsvd1";
383*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
384*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
385*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
386*4882a593Smuzhiyun			};
387*4882a593Smuzhiyun			pj0 {
388*4882a593Smuzhiyun				nvidia,pins = "pj0";
389*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
390*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
391*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
392*4882a593Smuzhiyun			};
393*4882a593Smuzhiyun			pj2 {
394*4882a593Smuzhiyun				nvidia,pins = "pj2";
395*4882a593Smuzhiyun				nvidia,function = "rsvd1";
396*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
397*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
398*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
399*4882a593Smuzhiyun			};
400*4882a593Smuzhiyun			uart2_cts_n_pj5 {
401*4882a593Smuzhiyun				nvidia,pins = "uart2_cts_n_pj5";
402*4882a593Smuzhiyun				nvidia,function = "uartb";
403*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
404*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
405*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
406*4882a593Smuzhiyun			};
407*4882a593Smuzhiyun			uart2_rts_n_pj6 {
408*4882a593Smuzhiyun				nvidia,pins = "uart2_rts_n_pj6";
409*4882a593Smuzhiyun				nvidia,function = "uartb";
410*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
411*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
412*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
413*4882a593Smuzhiyun			};
414*4882a593Smuzhiyun			pj7 {
415*4882a593Smuzhiyun				nvidia,pins = "pj7";
416*4882a593Smuzhiyun				nvidia,function = "uartd";
417*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
418*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
419*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
420*4882a593Smuzhiyun			};
421*4882a593Smuzhiyun			pk0 {
422*4882a593Smuzhiyun				nvidia,pins = "pk0";
423*4882a593Smuzhiyun				nvidia,function = "rsvd1";
424*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
425*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
426*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
427*4882a593Smuzhiyun			};
428*4882a593Smuzhiyun			pk1 {
429*4882a593Smuzhiyun				nvidia,pins = "pk1";
430*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
431*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
432*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
433*4882a593Smuzhiyun			};
434*4882a593Smuzhiyun			pk2 {
435*4882a593Smuzhiyun				nvidia,pins = "pk2";
436*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
437*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
438*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
439*4882a593Smuzhiyun			};
440*4882a593Smuzhiyun			pk3 {
441*4882a593Smuzhiyun				nvidia,pins = "pk3";
442*4882a593Smuzhiyun				nvidia,function = "gmi";
443*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
444*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
445*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
446*4882a593Smuzhiyun			};
447*4882a593Smuzhiyun			pk4 {
448*4882a593Smuzhiyun				nvidia,pins = "pk4";
449*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
450*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
451*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
452*4882a593Smuzhiyun			};
453*4882a593Smuzhiyun			spdif_out_pk5 {
454*4882a593Smuzhiyun				nvidia,pins = "spdif_out_pk5";
455*4882a593Smuzhiyun				nvidia,function = "rsvd2";
456*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
457*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
458*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
459*4882a593Smuzhiyun			};
460*4882a593Smuzhiyun			spdif_in_pk6 {
461*4882a593Smuzhiyun				nvidia,pins = "spdif_in_pk6";
462*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
463*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
464*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465*4882a593Smuzhiyun			};
466*4882a593Smuzhiyun			pk7 {
467*4882a593Smuzhiyun				nvidia,pins = "pk7";
468*4882a593Smuzhiyun				nvidia,function = "uartd";
469*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
471*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
472*4882a593Smuzhiyun			};
473*4882a593Smuzhiyun			dap1_fs_pn0 {
474*4882a593Smuzhiyun				nvidia,pins = "dap1_fs_pn0";
475*4882a593Smuzhiyun				nvidia,function = "rsvd4";
476*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
477*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
478*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
479*4882a593Smuzhiyun			};
480*4882a593Smuzhiyun			dap1_din_pn1 {
481*4882a593Smuzhiyun				nvidia,pins = "dap1_din_pn1";
482*4882a593Smuzhiyun				nvidia,function = "rsvd4";
483*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
484*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
485*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
486*4882a593Smuzhiyun			};
487*4882a593Smuzhiyun			dap1_dout_pn2 {
488*4882a593Smuzhiyun				nvidia,pins = "dap1_dout_pn2";
489*4882a593Smuzhiyun				nvidia,function = "sata";
490*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
491*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
492*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
493*4882a593Smuzhiyun			};
494*4882a593Smuzhiyun			dap1_sclk_pn3 {
495*4882a593Smuzhiyun				nvidia,pins = "dap1_sclk_pn3";
496*4882a593Smuzhiyun				nvidia,function = "rsvd4";
497*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
498*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
499*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
500*4882a593Smuzhiyun			};
501*4882a593Smuzhiyun			usb_vbus_en0_pn4 {
502*4882a593Smuzhiyun				nvidia,pins = "usb_vbus_en0_pn4";
503*4882a593Smuzhiyun				nvidia,function = "usb";
504*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
505*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
506*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
508*4882a593Smuzhiyun			};
509*4882a593Smuzhiyun			usb_vbus_en1_pn5 {
510*4882a593Smuzhiyun				nvidia,pins = "usb_vbus_en1_pn5";
511*4882a593Smuzhiyun				nvidia,function = "usb";
512*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
514*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
516*4882a593Smuzhiyun			};
517*4882a593Smuzhiyun			hdmi_int_pn7 {
518*4882a593Smuzhiyun				nvidia,pins = "hdmi_int_pn7";
519*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
520*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
521*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522*4882a593Smuzhiyun				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
523*4882a593Smuzhiyun			};
524*4882a593Smuzhiyun			ulpi_data7_po0 {
525*4882a593Smuzhiyun				nvidia,pins = "ulpi_data7_po0";
526*4882a593Smuzhiyun				nvidia,function = "ulpi";
527*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
528*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
529*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
530*4882a593Smuzhiyun			};
531*4882a593Smuzhiyun			ulpi_data0_po1 {
532*4882a593Smuzhiyun				nvidia,pins = "ulpi_data0_po1";
533*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
534*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
535*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
536*4882a593Smuzhiyun			};
537*4882a593Smuzhiyun			ulpi_data1_po2 {
538*4882a593Smuzhiyun				nvidia,pins = "ulpi_data1_po2";
539*4882a593Smuzhiyun				nvidia,function = "ulpi";
540*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
541*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
542*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
543*4882a593Smuzhiyun			};
544*4882a593Smuzhiyun			ulpi_data2_po3 {
545*4882a593Smuzhiyun				nvidia,pins = "ulpi_data2_po3";
546*4882a593Smuzhiyun				nvidia,function = "ulpi";
547*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
548*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
549*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
550*4882a593Smuzhiyun			};
551*4882a593Smuzhiyun			ulpi_data3_po4 {
552*4882a593Smuzhiyun				nvidia,pins = "ulpi_data3_po4";
553*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
554*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
555*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
556*4882a593Smuzhiyun			};
557*4882a593Smuzhiyun			ulpi_data4_po5 {
558*4882a593Smuzhiyun				nvidia,pins = "ulpi_data4_po5";
559*4882a593Smuzhiyun				nvidia,function = "ulpi";
560*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
561*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
562*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
563*4882a593Smuzhiyun			};
564*4882a593Smuzhiyun			ulpi_data5_po6 {
565*4882a593Smuzhiyun				nvidia,pins = "ulpi_data5_po6";
566*4882a593Smuzhiyun				nvidia,function = "ulpi";
567*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
568*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
569*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
570*4882a593Smuzhiyun			};
571*4882a593Smuzhiyun			ulpi_data6_po7 {
572*4882a593Smuzhiyun				nvidia,pins = "ulpi_data6_po7";
573*4882a593Smuzhiyun				nvidia,function = "ulpi";
574*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
575*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
576*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
577*4882a593Smuzhiyun			};
578*4882a593Smuzhiyun			dap3_fs_pp0 {
579*4882a593Smuzhiyun				nvidia,pins = "dap3_fs_pp0";
580*4882a593Smuzhiyun				nvidia,function = "i2s2";
581*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
582*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
583*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
584*4882a593Smuzhiyun			};
585*4882a593Smuzhiyun			dap3_din_pp1 {
586*4882a593Smuzhiyun				nvidia,pins = "dap3_din_pp1";
587*4882a593Smuzhiyun				nvidia,function = "i2s2";
588*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
589*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
590*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591*4882a593Smuzhiyun			};
592*4882a593Smuzhiyun			dap3_dout_pp2 {
593*4882a593Smuzhiyun				nvidia,pins = "dap3_dout_pp2";
594*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
595*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
596*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
597*4882a593Smuzhiyun			};
598*4882a593Smuzhiyun			dap3_sclk_pp3 {
599*4882a593Smuzhiyun				nvidia,pins = "dap3_sclk_pp3";
600*4882a593Smuzhiyun				nvidia,function = "rsvd3";
601*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
602*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
603*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
604*4882a593Smuzhiyun			};
605*4882a593Smuzhiyun			dap4_fs_pp4 {
606*4882a593Smuzhiyun				nvidia,pins = "dap4_fs_pp4";
607*4882a593Smuzhiyun				nvidia,function = "rsvd4";
608*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
609*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
610*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
611*4882a593Smuzhiyun			};
612*4882a593Smuzhiyun			dap4_din_pp5 {
613*4882a593Smuzhiyun				nvidia,pins = "dap4_din_pp5";
614*4882a593Smuzhiyun				nvidia,function = "rsvd3";
615*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
616*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
617*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
618*4882a593Smuzhiyun			};
619*4882a593Smuzhiyun			dap4_dout_pp6 {
620*4882a593Smuzhiyun				nvidia,pins = "dap4_dout_pp6";
621*4882a593Smuzhiyun				nvidia,function = "rsvd4";
622*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
623*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
624*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
625*4882a593Smuzhiyun			};
626*4882a593Smuzhiyun			dap4_sclk_pp7 {
627*4882a593Smuzhiyun				nvidia,pins = "dap4_sclk_pp7";
628*4882a593Smuzhiyun				nvidia,function = "rsvd3";
629*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
630*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
631*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
632*4882a593Smuzhiyun			};
633*4882a593Smuzhiyun			kb_col0_pq0 {
634*4882a593Smuzhiyun				nvidia,pins = "kb_col0_pq0";
635*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
636*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
637*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
638*4882a593Smuzhiyun			};
639*4882a593Smuzhiyun			kb_col1_pq1 {
640*4882a593Smuzhiyun				nvidia,pins = "kb_col1_pq1";
641*4882a593Smuzhiyun				nvidia,function = "rsvd2";
642*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
643*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
644*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
645*4882a593Smuzhiyun			};
646*4882a593Smuzhiyun			kb_col2_pq2 {
647*4882a593Smuzhiyun				nvidia,pins = "kb_col2_pq2";
648*4882a593Smuzhiyun				nvidia,function = "rsvd2";
649*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
650*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
651*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
652*4882a593Smuzhiyun			};
653*4882a593Smuzhiyun			kb_col3_pq3 {
654*4882a593Smuzhiyun				nvidia,pins = "kb_col3_pq3";
655*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
656*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
657*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
658*4882a593Smuzhiyun			};
659*4882a593Smuzhiyun			kb_col4_pq4 {
660*4882a593Smuzhiyun				nvidia,pins = "kb_col4_pq4";
661*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
662*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
663*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
664*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
665*4882a593Smuzhiyun			};
666*4882a593Smuzhiyun			kb_col5_pq5 {
667*4882a593Smuzhiyun				nvidia,pins = "kb_col5_pq5";
668*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
669*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
670*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
671*4882a593Smuzhiyun			};
672*4882a593Smuzhiyun			kb_col6_pq6 {
673*4882a593Smuzhiyun				nvidia,pins = "kb_col6_pq6";
674*4882a593Smuzhiyun				nvidia,function = "rsvd2";
675*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
676*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
677*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
678*4882a593Smuzhiyun			};
679*4882a593Smuzhiyun			kb_col7_pq7 {
680*4882a593Smuzhiyun				nvidia,pins = "kb_col7_pq7";
681*4882a593Smuzhiyun				nvidia,function = "rsvd2";
682*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
683*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
684*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
685*4882a593Smuzhiyun			};
686*4882a593Smuzhiyun			kb_row0_pr0 {
687*4882a593Smuzhiyun				nvidia,pins = "kb_row0_pr0";
688*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
689*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
690*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
691*4882a593Smuzhiyun			};
692*4882a593Smuzhiyun			kb_row1_pr1 {
693*4882a593Smuzhiyun				nvidia,pins = "kb_row1_pr1";
694*4882a593Smuzhiyun				nvidia,function = "rsvd2";
695*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
696*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
697*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
698*4882a593Smuzhiyun			};
699*4882a593Smuzhiyun			kb_row2_pr2 {
700*4882a593Smuzhiyun				nvidia,pins = "kb_row2_pr2";
701*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
702*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
703*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
704*4882a593Smuzhiyun			};
705*4882a593Smuzhiyun			kb_row3_pr3 {
706*4882a593Smuzhiyun				nvidia,pins = "kb_row3_pr3";
707*4882a593Smuzhiyun				nvidia,function = "kbc";
708*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
709*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
710*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
711*4882a593Smuzhiyun			};
712*4882a593Smuzhiyun			kb_row4_pr4 {
713*4882a593Smuzhiyun				nvidia,pins = "kb_row4_pr4";
714*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
715*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
716*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717*4882a593Smuzhiyun			};
718*4882a593Smuzhiyun			kb_row5_pr5 {
719*4882a593Smuzhiyun				nvidia,pins = "kb_row5_pr5";
720*4882a593Smuzhiyun				nvidia,function = "rsvd3";
721*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
722*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
723*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
724*4882a593Smuzhiyun			};
725*4882a593Smuzhiyun			kb_row6_pr6 {
726*4882a593Smuzhiyun				nvidia,pins = "kb_row6_pr6";
727*4882a593Smuzhiyun				nvidia,function = "displaya_alt";
728*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
729*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
730*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
731*4882a593Smuzhiyun			};
732*4882a593Smuzhiyun			kb_row7_pr7 {
733*4882a593Smuzhiyun				nvidia,pins = "kb_row7_pr7";
734*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
735*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
736*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
737*4882a593Smuzhiyun			};
738*4882a593Smuzhiyun			kb_row8_ps0 {
739*4882a593Smuzhiyun				nvidia,pins = "kb_row8_ps0";
740*4882a593Smuzhiyun				nvidia,function = "rsvd2";
741*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
742*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
743*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
744*4882a593Smuzhiyun			};
745*4882a593Smuzhiyun			kb_row9_ps1 {
746*4882a593Smuzhiyun				nvidia,pins = "kb_row9_ps1";
747*4882a593Smuzhiyun				nvidia,function = "uarta";
748*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
749*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
750*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
751*4882a593Smuzhiyun			};
752*4882a593Smuzhiyun			kb_row10_ps2 {
753*4882a593Smuzhiyun				nvidia,pins = "kb_row10_ps2";
754*4882a593Smuzhiyun				nvidia,function = "uarta";
755*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
756*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
757*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
758*4882a593Smuzhiyun			};
759*4882a593Smuzhiyun			kb_row11_ps3 {
760*4882a593Smuzhiyun				nvidia,pins = "kb_row11_ps3";
761*4882a593Smuzhiyun				nvidia,function = "rsvd2";
762*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
763*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
764*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
765*4882a593Smuzhiyun			};
766*4882a593Smuzhiyun			kb_row12_ps4 {
767*4882a593Smuzhiyun				nvidia,pins = "kb_row12_ps4";
768*4882a593Smuzhiyun				nvidia,function = "rsvd2";
769*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
770*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
771*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
772*4882a593Smuzhiyun			};
773*4882a593Smuzhiyun			kb_row13_ps5 {
774*4882a593Smuzhiyun				nvidia,pins = "kb_row13_ps5";
775*4882a593Smuzhiyun				nvidia,function = "rsvd2";
776*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
777*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
778*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
779*4882a593Smuzhiyun			};
780*4882a593Smuzhiyun			kb_row14_ps6 {
781*4882a593Smuzhiyun				nvidia,pins = "kb_row14_ps6";
782*4882a593Smuzhiyun				nvidia,function = "rsvd2";
783*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
784*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
785*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
786*4882a593Smuzhiyun			};
787*4882a593Smuzhiyun			kb_row15_ps7 {
788*4882a593Smuzhiyun				nvidia,pins = "kb_row15_ps7";
789*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
790*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
791*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
792*4882a593Smuzhiyun			};
793*4882a593Smuzhiyun			kb_row16_pt0 {
794*4882a593Smuzhiyun				nvidia,pins = "kb_row16_pt0";
795*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
796*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
797*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
798*4882a593Smuzhiyun			};
799*4882a593Smuzhiyun			kb_row17_pt1 {
800*4882a593Smuzhiyun				nvidia,pins = "kb_row17_pt1";
801*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
802*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
803*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
804*4882a593Smuzhiyun			};
805*4882a593Smuzhiyun			gen2_i2c_scl_pt5 {
806*4882a593Smuzhiyun				nvidia,pins = "gen2_i2c_scl_pt5";
807*4882a593Smuzhiyun				nvidia,function = "i2c2";
808*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
809*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
810*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
811*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
812*4882a593Smuzhiyun			};
813*4882a593Smuzhiyun			gen2_i2c_sda_pt6 {
814*4882a593Smuzhiyun				nvidia,pins = "gen2_i2c_sda_pt6";
815*4882a593Smuzhiyun				nvidia,function = "i2c2";
816*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
817*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
818*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
819*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
820*4882a593Smuzhiyun			};
821*4882a593Smuzhiyun			sdmmc4_cmd_pt7 {
822*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_cmd_pt7";
823*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
824*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
825*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
826*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
827*4882a593Smuzhiyun			};
828*4882a593Smuzhiyun			pu0 {
829*4882a593Smuzhiyun				nvidia,pins = "pu0";
830*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
831*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
832*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
833*4882a593Smuzhiyun			};
834*4882a593Smuzhiyun			pu1 {
835*4882a593Smuzhiyun				nvidia,pins = "pu1";
836*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
837*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
838*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
839*4882a593Smuzhiyun			};
840*4882a593Smuzhiyun			pu2 {
841*4882a593Smuzhiyun				nvidia,pins = "pu2";
842*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
843*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
844*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
845*4882a593Smuzhiyun			};
846*4882a593Smuzhiyun			pu3 {
847*4882a593Smuzhiyun				nvidia,pins = "pu3";
848*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
849*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
850*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
851*4882a593Smuzhiyun			};
852*4882a593Smuzhiyun			pu4 {
853*4882a593Smuzhiyun				nvidia,pins = "pu4";
854*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
855*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
856*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
857*4882a593Smuzhiyun			};
858*4882a593Smuzhiyun			pu5 {
859*4882a593Smuzhiyun				nvidia,pins = "pu5";
860*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
861*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
862*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
863*4882a593Smuzhiyun			};
864*4882a593Smuzhiyun			pu6 {
865*4882a593Smuzhiyun				nvidia,pins = "pu6";
866*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
867*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
868*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
869*4882a593Smuzhiyun			};
870*4882a593Smuzhiyun			pv0 {
871*4882a593Smuzhiyun				nvidia,pins = "pv0";
872*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
873*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
874*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
875*4882a593Smuzhiyun			};
876*4882a593Smuzhiyun			pv1 {
877*4882a593Smuzhiyun				nvidia,pins = "pv1";
878*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
879*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
880*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
881*4882a593Smuzhiyun			};
882*4882a593Smuzhiyun			sdmmc3_cd_n_pv2 {
883*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_cd_n_pv2";
884*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
885*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
886*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
887*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
888*4882a593Smuzhiyun			};
889*4882a593Smuzhiyun			sdmmc1_wp_n_pv3 {
890*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_wp_n_pv3";
891*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
892*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
893*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
894*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
895*4882a593Smuzhiyun			};
896*4882a593Smuzhiyun			ddc_scl_pv4 {
897*4882a593Smuzhiyun				nvidia,pins = "ddc_scl_pv4";
898*4882a593Smuzhiyun				nvidia,function = "i2c4";
899*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
900*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
901*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
902*4882a593Smuzhiyun				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
903*4882a593Smuzhiyun			};
904*4882a593Smuzhiyun			ddc_sda_pv5 {
905*4882a593Smuzhiyun				nvidia,pins = "ddc_sda_pv5";
906*4882a593Smuzhiyun				nvidia,function = "i2c4";
907*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
908*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
909*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
910*4882a593Smuzhiyun				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
911*4882a593Smuzhiyun			};
912*4882a593Smuzhiyun			gpio_w2_aud_pw2 {
913*4882a593Smuzhiyun				nvidia,pins = "gpio_w2_aud_pw2";
914*4882a593Smuzhiyun				nvidia,function = "rsvd2";
915*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
916*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
917*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
918*4882a593Smuzhiyun			};
919*4882a593Smuzhiyun			gpio_w3_aud_pw3 {
920*4882a593Smuzhiyun				nvidia,pins = "gpio_w3_aud_pw3";
921*4882a593Smuzhiyun				nvidia,function = "spi6";
922*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
923*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
924*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
925*4882a593Smuzhiyun			};
926*4882a593Smuzhiyun			dap_mclk1_pw4 {
927*4882a593Smuzhiyun				nvidia,pins = "dap_mclk1_pw4";
928*4882a593Smuzhiyun				nvidia,function = "extperiph1";
929*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
930*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
931*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
932*4882a593Smuzhiyun			};
933*4882a593Smuzhiyun			clk2_out_pw5 {
934*4882a593Smuzhiyun				nvidia,pins = "clk2_out_pw5";
935*4882a593Smuzhiyun				nvidia,function = "extperiph2";
936*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
937*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
938*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
939*4882a593Smuzhiyun			};
940*4882a593Smuzhiyun			uart3_txd_pw6 {
941*4882a593Smuzhiyun				nvidia,pins = "uart3_txd_pw6";
942*4882a593Smuzhiyun				nvidia,function = "rsvd2";
943*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
944*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
945*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
946*4882a593Smuzhiyun			};
947*4882a593Smuzhiyun			uart3_rxd_pw7 {
948*4882a593Smuzhiyun				nvidia,pins = "uart3_rxd_pw7";
949*4882a593Smuzhiyun				nvidia,function = "rsvd2";
950*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
951*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
952*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
953*4882a593Smuzhiyun			};
954*4882a593Smuzhiyun			dvfs_pwm_px0 {
955*4882a593Smuzhiyun				nvidia,pins = "dvfs_pwm_px0";
956*4882a593Smuzhiyun				nvidia,function = "cldvfs";
957*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
958*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
959*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
960*4882a593Smuzhiyun			};
961*4882a593Smuzhiyun			gpio_x1_aud_px1 {
962*4882a593Smuzhiyun				nvidia,pins = "gpio_x1_aud_px1";
963*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
964*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
965*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
966*4882a593Smuzhiyun			};
967*4882a593Smuzhiyun			dvfs_clk_px2 {
968*4882a593Smuzhiyun				nvidia,pins = "dvfs_clk_px2";
969*4882a593Smuzhiyun				nvidia,function = "cldvfs";
970*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
971*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
972*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
973*4882a593Smuzhiyun			};
974*4882a593Smuzhiyun			gpio_x3_aud_px3 {
975*4882a593Smuzhiyun				nvidia,pins = "gpio_x3_aud_px3";
976*4882a593Smuzhiyun				nvidia,function = "rsvd4";
977*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
978*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
979*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
980*4882a593Smuzhiyun			};
981*4882a593Smuzhiyun			gpio_x4_aud_px4 {
982*4882a593Smuzhiyun				nvidia,pins = "gpio_x4_aud_px4";
983*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
984*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
985*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
986*4882a593Smuzhiyun			};
987*4882a593Smuzhiyun			gpio_x5_aud_px5 {
988*4882a593Smuzhiyun				nvidia,pins = "gpio_x5_aud_px5";
989*4882a593Smuzhiyun				nvidia,function = "rsvd4";
990*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
991*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
992*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
993*4882a593Smuzhiyun			};
994*4882a593Smuzhiyun			gpio_x6_aud_px6 {
995*4882a593Smuzhiyun				nvidia,pins = "gpio_x6_aud_px6";
996*4882a593Smuzhiyun				nvidia,function = "gmi";
997*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
998*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
999*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1000*4882a593Smuzhiyun			};
1001*4882a593Smuzhiyun			gpio_x7_aud_px7 {
1002*4882a593Smuzhiyun				nvidia,pins = "gpio_x7_aud_px7";
1003*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1004*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1005*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1006*4882a593Smuzhiyun			};
1007*4882a593Smuzhiyun			ulpi_clk_py0 {
1008*4882a593Smuzhiyun				nvidia,pins = "ulpi_clk_py0";
1009*4882a593Smuzhiyun				nvidia,function = "spi1";
1010*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1011*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1012*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1013*4882a593Smuzhiyun			};
1014*4882a593Smuzhiyun			ulpi_dir_py1 {
1015*4882a593Smuzhiyun				nvidia,pins = "ulpi_dir_py1";
1016*4882a593Smuzhiyun				nvidia,function = "spi1";
1017*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1018*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1019*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1020*4882a593Smuzhiyun			};
1021*4882a593Smuzhiyun			ulpi_nxt_py2 {
1022*4882a593Smuzhiyun				nvidia,pins = "ulpi_nxt_py2";
1023*4882a593Smuzhiyun				nvidia,function = "spi1";
1024*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1025*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1026*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1027*4882a593Smuzhiyun			};
1028*4882a593Smuzhiyun			ulpi_stp_py3 {
1029*4882a593Smuzhiyun				nvidia,pins = "ulpi_stp_py3";
1030*4882a593Smuzhiyun				nvidia,function = "spi1";
1031*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1032*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1033*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1034*4882a593Smuzhiyun			};
1035*4882a593Smuzhiyun			sdmmc1_dat3_py4 {
1036*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_dat3_py4";
1037*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
1038*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1039*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1040*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1041*4882a593Smuzhiyun			};
1042*4882a593Smuzhiyun			sdmmc1_dat2_py5 {
1043*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_dat2_py5";
1044*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
1045*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1046*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1047*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1048*4882a593Smuzhiyun			};
1049*4882a593Smuzhiyun			sdmmc1_dat1_py6 {
1050*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_dat1_py6";
1051*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
1052*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1053*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1054*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1055*4882a593Smuzhiyun			};
1056*4882a593Smuzhiyun			sdmmc1_dat0_py7 {
1057*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_dat0_py7";
1058*4882a593Smuzhiyun				nvidia,function = "rsvd2";
1059*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1060*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1061*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1062*4882a593Smuzhiyun			};
1063*4882a593Smuzhiyun			sdmmc1_clk_pz0 {
1064*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_clk_pz0";
1065*4882a593Smuzhiyun				nvidia,function = "rsvd3";
1066*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1067*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1068*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1069*4882a593Smuzhiyun			};
1070*4882a593Smuzhiyun			sdmmc1_cmd_pz1 {
1071*4882a593Smuzhiyun				nvidia,pins = "sdmmc1_cmd_pz1";
1072*4882a593Smuzhiyun				nvidia,function = "sdmmc1";
1073*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1074*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1075*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1076*4882a593Smuzhiyun			};
1077*4882a593Smuzhiyun			pwr_i2c_scl_pz6 {
1078*4882a593Smuzhiyun				nvidia,pins = "pwr_i2c_scl_pz6";
1079*4882a593Smuzhiyun				nvidia,function = "i2cpwr";
1080*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1081*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1082*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1083*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1084*4882a593Smuzhiyun			};
1085*4882a593Smuzhiyun			pwr_i2c_sda_pz7 {
1086*4882a593Smuzhiyun				nvidia,pins = "pwr_i2c_sda_pz7";
1087*4882a593Smuzhiyun				nvidia,function = "i2cpwr";
1088*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1089*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1090*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1091*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1092*4882a593Smuzhiyun			};
1093*4882a593Smuzhiyun			sdmmc4_dat0_paa0 {
1094*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat0_paa0";
1095*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1096*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1097*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1098*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1099*4882a593Smuzhiyun			};
1100*4882a593Smuzhiyun			sdmmc4_dat1_paa1 {
1101*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat1_paa1";
1102*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1103*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1104*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1105*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1106*4882a593Smuzhiyun			};
1107*4882a593Smuzhiyun			sdmmc4_dat2_paa2 {
1108*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat2_paa2";
1109*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1110*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1111*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1112*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1113*4882a593Smuzhiyun			};
1114*4882a593Smuzhiyun			sdmmc4_dat3_paa3 {
1115*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat3_paa3";
1116*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1117*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1118*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1119*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1120*4882a593Smuzhiyun			};
1121*4882a593Smuzhiyun			sdmmc4_dat4_paa4 {
1122*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat4_paa4";
1123*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1124*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1125*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1126*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1127*4882a593Smuzhiyun			};
1128*4882a593Smuzhiyun			sdmmc4_dat5_paa5 {
1129*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat5_paa5";
1130*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1131*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1132*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1133*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1134*4882a593Smuzhiyun			};
1135*4882a593Smuzhiyun			sdmmc4_dat6_paa6 {
1136*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat6_paa6";
1137*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1138*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1139*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1140*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1141*4882a593Smuzhiyun			};
1142*4882a593Smuzhiyun			sdmmc4_dat7_paa7 {
1143*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_dat7_paa7";
1144*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1145*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1146*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1147*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1148*4882a593Smuzhiyun			};
1149*4882a593Smuzhiyun			pbb0 {
1150*4882a593Smuzhiyun				nvidia,pins = "pbb0";
1151*4882a593Smuzhiyun				nvidia,function = "vimclk2_alt";
1152*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1153*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1154*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1155*4882a593Smuzhiyun			};
1156*4882a593Smuzhiyun			cam_i2c_scl_pbb1 {
1157*4882a593Smuzhiyun				nvidia,pins = "cam_i2c_scl_pbb1";
1158*4882a593Smuzhiyun				nvidia,function = "i2c3";
1159*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1160*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1161*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1162*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1163*4882a593Smuzhiyun			};
1164*4882a593Smuzhiyun			cam_i2c_sda_pbb2 {
1165*4882a593Smuzhiyun				nvidia,pins = "cam_i2c_sda_pbb2";
1166*4882a593Smuzhiyun				nvidia,function = "i2c3";
1167*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1168*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1169*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1170*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1171*4882a593Smuzhiyun			};
1172*4882a593Smuzhiyun			pbb3 {
1173*4882a593Smuzhiyun				nvidia,pins = "pbb3";
1174*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1175*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1176*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1177*4882a593Smuzhiyun			};
1178*4882a593Smuzhiyun			pbb4 {
1179*4882a593Smuzhiyun				nvidia,pins = "pbb4";
1180*4882a593Smuzhiyun				nvidia,function = "vgp4";
1181*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1182*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1183*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1184*4882a593Smuzhiyun			};
1185*4882a593Smuzhiyun			pbb5 {
1186*4882a593Smuzhiyun				nvidia,pins = "pbb5";
1187*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1188*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1189*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1190*4882a593Smuzhiyun			};
1191*4882a593Smuzhiyun			pbb6 {
1192*4882a593Smuzhiyun				nvidia,pins = "pbb6";
1193*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1194*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1195*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1196*4882a593Smuzhiyun			};
1197*4882a593Smuzhiyun			pbb7 {
1198*4882a593Smuzhiyun				nvidia,pins = "pbb7";
1199*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1200*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1201*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1202*4882a593Smuzhiyun			};
1203*4882a593Smuzhiyun			cam_mclk_pcc0 {
1204*4882a593Smuzhiyun				nvidia,pins = "cam_mclk_pcc0";
1205*4882a593Smuzhiyun				nvidia,function = "vi_alt3";
1206*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1207*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1208*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1209*4882a593Smuzhiyun			};
1210*4882a593Smuzhiyun			pcc1 {
1211*4882a593Smuzhiyun				nvidia,pins = "pcc1";
1212*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1213*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1214*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1215*4882a593Smuzhiyun			};
1216*4882a593Smuzhiyun			pcc2 {
1217*4882a593Smuzhiyun				nvidia,pins = "pcc2";
1218*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1219*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1220*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1221*4882a593Smuzhiyun			};
1222*4882a593Smuzhiyun			sdmmc4_clk_pcc4 {
1223*4882a593Smuzhiyun				nvidia,pins = "sdmmc4_clk_pcc4";
1224*4882a593Smuzhiyun				nvidia,function = "sdmmc4";
1225*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1226*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1227*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1228*4882a593Smuzhiyun			};
1229*4882a593Smuzhiyun			clk2_req_pcc5 {
1230*4882a593Smuzhiyun				nvidia,pins = "clk2_req_pcc5";
1231*4882a593Smuzhiyun				nvidia,function = "rsvd2";
1232*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1233*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1234*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1235*4882a593Smuzhiyun			};
1236*4882a593Smuzhiyun			pex_l0_rst_n_pdd1 {
1237*4882a593Smuzhiyun				nvidia,pins = "pex_l0_rst_n_pdd1";
1238*4882a593Smuzhiyun				nvidia,function = "pe0";
1239*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1240*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1241*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1242*4882a593Smuzhiyun			};
1243*4882a593Smuzhiyun			pex_l0_clkreq_n_pdd2 {
1244*4882a593Smuzhiyun				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1245*4882a593Smuzhiyun				nvidia,function = "pe0";
1246*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1247*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1248*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1249*4882a593Smuzhiyun			};
1250*4882a593Smuzhiyun			pex_wake_n_pdd3 {
1251*4882a593Smuzhiyun				nvidia,pins = "pex_wake_n_pdd3";
1252*4882a593Smuzhiyun				nvidia,function = "pe";
1253*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1254*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1255*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1256*4882a593Smuzhiyun			};
1257*4882a593Smuzhiyun			pex_l1_rst_n_pdd5 {
1258*4882a593Smuzhiyun				nvidia,pins = "pex_l1_rst_n_pdd5";
1259*4882a593Smuzhiyun				nvidia,function = "pe1";
1260*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1261*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1262*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1263*4882a593Smuzhiyun			};
1264*4882a593Smuzhiyun			pex_l1_clkreq_n_pdd6 {
1265*4882a593Smuzhiyun				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1266*4882a593Smuzhiyun				nvidia,function = "pe1";
1267*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1268*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1269*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1270*4882a593Smuzhiyun			};
1271*4882a593Smuzhiyun			clk3_out_pee0 {
1272*4882a593Smuzhiyun				nvidia,pins = "clk3_out_pee0";
1273*4882a593Smuzhiyun				nvidia,function = "extperiph3";
1274*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1275*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1276*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1277*4882a593Smuzhiyun			};
1278*4882a593Smuzhiyun			clk3_req_pee1 {
1279*4882a593Smuzhiyun				nvidia,pins = "clk3_req_pee1";
1280*4882a593Smuzhiyun				nvidia,function = "rsvd2";
1281*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1282*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1283*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1284*4882a593Smuzhiyun			};
1285*4882a593Smuzhiyun			dap_mclk1_req_pee2 {
1286*4882a593Smuzhiyun				nvidia,pins = "dap_mclk1_req_pee2";
1287*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1288*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1289*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1290*4882a593Smuzhiyun			};
1291*4882a593Smuzhiyun			hdmi_cec_pee3 {
1292*4882a593Smuzhiyun				nvidia,pins = "hdmi_cec_pee3";
1293*4882a593Smuzhiyun				nvidia,function = "cec";
1294*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1295*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1296*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1297*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1298*4882a593Smuzhiyun			};
1299*4882a593Smuzhiyun			sdmmc3_clk_lb_out_pee4 {
1300*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1301*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
1302*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1303*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1304*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1305*4882a593Smuzhiyun			};
1306*4882a593Smuzhiyun			sdmmc3_clk_lb_in_pee5 {
1307*4882a593Smuzhiyun				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1308*4882a593Smuzhiyun				nvidia,function = "sdmmc3";
1309*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1310*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1311*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1312*4882a593Smuzhiyun			};
1313*4882a593Smuzhiyun			dp_hpd_pff0 {
1314*4882a593Smuzhiyun				nvidia,pins = "dp_hpd_pff0";
1315*4882a593Smuzhiyun				nvidia,function = "dp";
1316*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1317*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1318*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1319*4882a593Smuzhiyun			};
1320*4882a593Smuzhiyun			usb_vbus_en2_pff1 {
1321*4882a593Smuzhiyun				nvidia,pins = "usb_vbus_en2_pff1";
1322*4882a593Smuzhiyun				nvidia,function = "rsvd2";
1323*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1324*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1325*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1326*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1327*4882a593Smuzhiyun			};
1328*4882a593Smuzhiyun			pff2 {
1329*4882a593Smuzhiyun				nvidia,pins = "pff2";
1330*4882a593Smuzhiyun				nvidia,function = "rsvd2";
1331*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1332*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1333*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1334*4882a593Smuzhiyun				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1335*4882a593Smuzhiyun			};
1336*4882a593Smuzhiyun			core_pwr_req {
1337*4882a593Smuzhiyun				nvidia,pins = "core_pwr_req";
1338*4882a593Smuzhiyun				nvidia,function = "pwron";
1339*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1340*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1341*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1342*4882a593Smuzhiyun			};
1343*4882a593Smuzhiyun			cpu_pwr_req {
1344*4882a593Smuzhiyun				nvidia,pins = "cpu_pwr_req";
1345*4882a593Smuzhiyun				nvidia,function = "cpu";
1346*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1347*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1348*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1349*4882a593Smuzhiyun			};
1350*4882a593Smuzhiyun			pwr_int_n {
1351*4882a593Smuzhiyun				nvidia,pins = "pwr_int_n";
1352*4882a593Smuzhiyun				nvidia,function = "pmi";
1353*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1354*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1355*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1356*4882a593Smuzhiyun			};
1357*4882a593Smuzhiyun			reset_out_n {
1358*4882a593Smuzhiyun				nvidia,pins = "reset_out_n";
1359*4882a593Smuzhiyun				nvidia,function = "reset_out_n";
1360*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1361*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1362*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1363*4882a593Smuzhiyun			};
1364*4882a593Smuzhiyun			clk_32k_in {
1365*4882a593Smuzhiyun				nvidia,pins = "clk_32k_in";
1366*4882a593Smuzhiyun				nvidia,function = "clk";
1367*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1368*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1369*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1370*4882a593Smuzhiyun			};
1371*4882a593Smuzhiyun			jtag_rtck {
1372*4882a593Smuzhiyun				nvidia,pins = "jtag_rtck";
1373*4882a593Smuzhiyun				nvidia,function = "rtck";
1374*4882a593Smuzhiyun				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1375*4882a593Smuzhiyun				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1376*4882a593Smuzhiyun				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1377*4882a593Smuzhiyun			};
1378*4882a593Smuzhiyun			dsi_b {
1379*4882a593Smuzhiyun				nvidia,pins = "mipi_pad_ctrl_dsi_b";
1380*4882a593Smuzhiyun				nvidia,function = "dsi_b";
1381*4882a593Smuzhiyun			};
1382*4882a593Smuzhiyun		};
1383*4882a593Smuzhiyun	};
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun	/*
1386*4882a593Smuzhiyun	 * First high speed UART, exposed on the expansion connector J3A2
1387*4882a593Smuzhiyun	 *   Pin 41: BR_UART1_TXD
1388*4882a593Smuzhiyun	 *   Pin 44: BR_UART1_RXD
1389*4882a593Smuzhiyun	 */
1390*4882a593Smuzhiyun	serial@70006000 {
1391*4882a593Smuzhiyun		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1392*4882a593Smuzhiyun		status = "okay";
1393*4882a593Smuzhiyun	};
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun	/*
1396*4882a593Smuzhiyun	 * Second high speed UART, exposed on the expansion connector J3A2
1397*4882a593Smuzhiyun	 *   Pin 65: UART2_RXD
1398*4882a593Smuzhiyun	 *   Pin 68: UART2_TXD
1399*4882a593Smuzhiyun	 *   Pin 71: UART2_CTS_L
1400*4882a593Smuzhiyun	 *   Pin 74: UART2_RTS_L
1401*4882a593Smuzhiyun	 */
1402*4882a593Smuzhiyun	serial@70006040 {
1403*4882a593Smuzhiyun		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1404*4882a593Smuzhiyun		status = "okay";
1405*4882a593Smuzhiyun	};
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun	/* DB9 serial port */
1408*4882a593Smuzhiyun	serial@70006300 {
1409*4882a593Smuzhiyun		status = "okay";
1410*4882a593Smuzhiyun	};
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun	/* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1413*4882a593Smuzhiyun	i2c@7000c000 {
1414*4882a593Smuzhiyun		status = "okay";
1415*4882a593Smuzhiyun		clock-frequency = <100000>;
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun		rt5639: audio-codec@1c {
1418*4882a593Smuzhiyun			compatible = "realtek,rt5639";
1419*4882a593Smuzhiyun			reg = <0x1c>;
1420*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
1421*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
1422*4882a593Smuzhiyun			realtek,ldo1-en-gpios =
1423*4882a593Smuzhiyun				<&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1424*4882a593Smuzhiyun		};
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun		temperature-sensor@4c {
1427*4882a593Smuzhiyun			compatible = "ti,tmp451";
1428*4882a593Smuzhiyun			reg = <0x4c>;
1429*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
1430*4882a593Smuzhiyun			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1431*4882a593Smuzhiyun		};
1432*4882a593Smuzhiyun
1433*4882a593Smuzhiyun		eeprom@56 {
1434*4882a593Smuzhiyun			compatible = "atmel,24c02";
1435*4882a593Smuzhiyun			reg = <0x56>;
1436*4882a593Smuzhiyun			pagesize = <8>;
1437*4882a593Smuzhiyun		};
1438*4882a593Smuzhiyun	};
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun	/* Expansion GEN2_I2C_* */
1441*4882a593Smuzhiyun	i2c@7000c400 {
1442*4882a593Smuzhiyun		status = "okay";
1443*4882a593Smuzhiyun		clock-frequency = <100000>;
1444*4882a593Smuzhiyun	};
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun	/* Expansion CAM_I2C_* */
1447*4882a593Smuzhiyun	i2c@7000c500 {
1448*4882a593Smuzhiyun		status = "okay";
1449*4882a593Smuzhiyun		clock-frequency = <100000>;
1450*4882a593Smuzhiyun	};
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun	/* HDMI DDC */
1453*4882a593Smuzhiyun	hdmi_ddc: i2c@7000c700 {
1454*4882a593Smuzhiyun		status = "okay";
1455*4882a593Smuzhiyun		clock-frequency = <100000>;
1456*4882a593Smuzhiyun	};
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun	/* Expansion PWR_I2C_*, on-board components */
1459*4882a593Smuzhiyun	i2c@7000d000 {
1460*4882a593Smuzhiyun		status = "okay";
1461*4882a593Smuzhiyun		clock-frequency = <400000>;
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun		pmic: pmic@40 {
1464*4882a593Smuzhiyun			compatible = "ams,as3722";
1465*4882a593Smuzhiyun			reg = <0x40>;
1466*4882a593Smuzhiyun			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun			ams,system-power-controller;
1469*4882a593Smuzhiyun
1470*4882a593Smuzhiyun			#interrupt-cells = <2>;
1471*4882a593Smuzhiyun			interrupt-controller;
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun			gpio-controller;
1474*4882a593Smuzhiyun			#gpio-cells = <2>;
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun			pinctrl-names = "default";
1477*4882a593Smuzhiyun			pinctrl-0 = <&as3722_default>;
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun			as3722_default: pinmux {
1480*4882a593Smuzhiyun				gpio0 {
1481*4882a593Smuzhiyun					pins = "gpio0";
1482*4882a593Smuzhiyun					function = "gpio";
1483*4882a593Smuzhiyun					bias-pull-down;
1484*4882a593Smuzhiyun				};
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun				gpio1_2_4_7 {
1487*4882a593Smuzhiyun					pins = "gpio1", "gpio2", "gpio4", "gpio7";
1488*4882a593Smuzhiyun					function = "gpio";
1489*4882a593Smuzhiyun					bias-pull-up;
1490*4882a593Smuzhiyun				};
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun				gpio3_5_6 {
1493*4882a593Smuzhiyun					pins = "gpio3", "gpio5", "gpio6";
1494*4882a593Smuzhiyun					bias-high-impedance;
1495*4882a593Smuzhiyun				};
1496*4882a593Smuzhiyun			};
1497*4882a593Smuzhiyun
1498*4882a593Smuzhiyun			regulators {
1499*4882a593Smuzhiyun				vsup-sd2-supply = <&vdd_5v0_sys>;
1500*4882a593Smuzhiyun				vsup-sd3-supply = <&vdd_5v0_sys>;
1501*4882a593Smuzhiyun				vsup-sd4-supply = <&vdd_5v0_sys>;
1502*4882a593Smuzhiyun				vsup-sd5-supply = <&vdd_5v0_sys>;
1503*4882a593Smuzhiyun				vin-ldo0-supply = <&vdd_1v35_lp0>;
1504*4882a593Smuzhiyun				vin-ldo1-6-supply = <&vdd_3v3_run>;
1505*4882a593Smuzhiyun				vin-ldo2-5-7-supply = <&vddio_1v8>;
1506*4882a593Smuzhiyun				vin-ldo3-4-supply = <&vdd_3v3_sys>;
1507*4882a593Smuzhiyun				vin-ldo9-10-supply = <&vdd_5v0_sys>;
1508*4882a593Smuzhiyun				vin-ldo11-supply = <&vdd_3v3_run>;
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun				vdd_cpu: sd0 {
1511*4882a593Smuzhiyun					regulator-name = "+VDD_CPU_AP";
1512*4882a593Smuzhiyun					regulator-min-microvolt = <700000>;
1513*4882a593Smuzhiyun					regulator-max-microvolt = <1400000>;
1514*4882a593Smuzhiyun					regulator-min-microamp = <3500000>;
1515*4882a593Smuzhiyun					regulator-max-microamp = <3500000>;
1516*4882a593Smuzhiyun					regulator-always-on;
1517*4882a593Smuzhiyun					regulator-boot-on;
1518*4882a593Smuzhiyun					ams,ext-control = <2>;
1519*4882a593Smuzhiyun				};
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun				sd1 {
1522*4882a593Smuzhiyun					regulator-name = "+VDD_CORE";
1523*4882a593Smuzhiyun					regulator-min-microvolt = <700000>;
1524*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
1525*4882a593Smuzhiyun					regulator-min-microamp = <2500000>;
1526*4882a593Smuzhiyun					regulator-max-microamp = <2500000>;
1527*4882a593Smuzhiyun					regulator-always-on;
1528*4882a593Smuzhiyun					regulator-boot-on;
1529*4882a593Smuzhiyun					ams,ext-control = <1>;
1530*4882a593Smuzhiyun				};
1531*4882a593Smuzhiyun
1532*4882a593Smuzhiyun				vdd_1v35_lp0: sd2 {
1533*4882a593Smuzhiyun					regulator-name = "+1.35V_LP0(sd2)";
1534*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
1535*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
1536*4882a593Smuzhiyun					regulator-always-on;
1537*4882a593Smuzhiyun					regulator-boot-on;
1538*4882a593Smuzhiyun				};
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun				sd3 {
1541*4882a593Smuzhiyun					regulator-name = "+1.35V_LP0(sd3)";
1542*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
1543*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
1544*4882a593Smuzhiyun					regulator-always-on;
1545*4882a593Smuzhiyun					regulator-boot-on;
1546*4882a593Smuzhiyun				};
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun				vdd_1v05_run: sd4 {
1549*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN";
1550*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
1551*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
1552*4882a593Smuzhiyun				};
1553*4882a593Smuzhiyun
1554*4882a593Smuzhiyun				vddio_1v8: sd5 {
1555*4882a593Smuzhiyun					regulator-name = "+1.8V_VDDIO";
1556*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
1557*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
1558*4882a593Smuzhiyun					regulator-boot-on;
1559*4882a593Smuzhiyun					regulator-always-on;
1560*4882a593Smuzhiyun				};
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun				vdd_gpu: sd6 {
1563*4882a593Smuzhiyun					regulator-name = "+VDD_GPU_AP";
1564*4882a593Smuzhiyun					regulator-min-microvolt = <650000>;
1565*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
1566*4882a593Smuzhiyun					regulator-min-microamp = <3500000>;
1567*4882a593Smuzhiyun					regulator-max-microamp = <3500000>;
1568*4882a593Smuzhiyun					regulator-boot-on;
1569*4882a593Smuzhiyun					regulator-always-on;
1570*4882a593Smuzhiyun				};
1571*4882a593Smuzhiyun
1572*4882a593Smuzhiyun				avdd_1v05_run: ldo0 {
1573*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN_AVDD";
1574*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
1575*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
1576*4882a593Smuzhiyun					regulator-boot-on;
1577*4882a593Smuzhiyun					regulator-always-on;
1578*4882a593Smuzhiyun					ams,ext-control = <1>;
1579*4882a593Smuzhiyun				};
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun				ldo1 {
1582*4882a593Smuzhiyun					regulator-name = "+1.8V_RUN_CAM";
1583*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
1584*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
1585*4882a593Smuzhiyun				};
1586*4882a593Smuzhiyun
1587*4882a593Smuzhiyun				ldo2 {
1588*4882a593Smuzhiyun					regulator-name = "+1.2V_GEN_AVDD";
1589*4882a593Smuzhiyun					regulator-min-microvolt = <1200000>;
1590*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
1591*4882a593Smuzhiyun					regulator-boot-on;
1592*4882a593Smuzhiyun					regulator-always-on;
1593*4882a593Smuzhiyun				};
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun				ldo3 {
1596*4882a593Smuzhiyun					regulator-name = "+1.05V_LP0_VDD_RTC";
1597*4882a593Smuzhiyun					regulator-min-microvolt = <1000000>;
1598*4882a593Smuzhiyun					regulator-max-microvolt = <1000000>;
1599*4882a593Smuzhiyun					regulator-boot-on;
1600*4882a593Smuzhiyun					regulator-always-on;
1601*4882a593Smuzhiyun					ams,enable-tracking;
1602*4882a593Smuzhiyun				};
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun				ldo4 {
1605*4882a593Smuzhiyun					regulator-name = "+2.8V_RUN_CAM";
1606*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
1607*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
1608*4882a593Smuzhiyun				};
1609*4882a593Smuzhiyun
1610*4882a593Smuzhiyun				ldo5 {
1611*4882a593Smuzhiyun					regulator-name = "+1.2V_RUN_CAM_FRONT";
1612*4882a593Smuzhiyun					regulator-min-microvolt = <1200000>;
1613*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
1614*4882a593Smuzhiyun				};
1615*4882a593Smuzhiyun
1616*4882a593Smuzhiyun				vddio_sdmmc3: ldo6 {
1617*4882a593Smuzhiyun					regulator-name = "+VDDIO_SDMMC3";
1618*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
1619*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
1620*4882a593Smuzhiyun				};
1621*4882a593Smuzhiyun
1622*4882a593Smuzhiyun				ldo7 {
1623*4882a593Smuzhiyun					regulator-name = "+1.05V_RUN_CAM_REAR";
1624*4882a593Smuzhiyun					regulator-min-microvolt = <1050000>;
1625*4882a593Smuzhiyun					regulator-max-microvolt = <1050000>;
1626*4882a593Smuzhiyun				};
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun				ldo9 {
1629*4882a593Smuzhiyun					regulator-name = "+3.3V_RUN_TOUCH";
1630*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
1631*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
1632*4882a593Smuzhiyun				};
1633*4882a593Smuzhiyun
1634*4882a593Smuzhiyun				ldo10 {
1635*4882a593Smuzhiyun					regulator-name = "+2.8V_RUN_CAM_AF";
1636*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
1637*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
1638*4882a593Smuzhiyun				};
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun				ldo11 {
1641*4882a593Smuzhiyun					regulator-name = "+1.8V_RUN_VPP_FUSE";
1642*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
1643*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
1644*4882a593Smuzhiyun				};
1645*4882a593Smuzhiyun			};
1646*4882a593Smuzhiyun		};
1647*4882a593Smuzhiyun	};
1648*4882a593Smuzhiyun
1649*4882a593Smuzhiyun	/* Expansion TS_SPI_* */
1650*4882a593Smuzhiyun	spi@7000d400 {
1651*4882a593Smuzhiyun		status = "okay";
1652*4882a593Smuzhiyun	};
1653*4882a593Smuzhiyun
1654*4882a593Smuzhiyun	/* Internal SPI */
1655*4882a593Smuzhiyun	spi@7000da00 {
1656*4882a593Smuzhiyun		status = "okay";
1657*4882a593Smuzhiyun		spi-max-frequency = <25000000>;
1658*4882a593Smuzhiyun		spi-flash@0 {
1659*4882a593Smuzhiyun			compatible = "winbond,w25q32dw", "jedec,spi-nor";
1660*4882a593Smuzhiyun			reg = <0>;
1661*4882a593Smuzhiyun			spi-max-frequency = <20000000>;
1662*4882a593Smuzhiyun		};
1663*4882a593Smuzhiyun	};
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun	pmc@7000e400 {
1666*4882a593Smuzhiyun		nvidia,invert-interrupt;
1667*4882a593Smuzhiyun		nvidia,suspend-mode = <1>;
1668*4882a593Smuzhiyun		nvidia,cpu-pwr-good-time = <500>;
1669*4882a593Smuzhiyun		nvidia,cpu-pwr-off-time = <300>;
1670*4882a593Smuzhiyun		nvidia,core-pwr-good-time = <641 3845>;
1671*4882a593Smuzhiyun		nvidia,core-pwr-off-time = <61036>;
1672*4882a593Smuzhiyun		nvidia,core-power-req-active-high;
1673*4882a593Smuzhiyun		nvidia,sys-clock-req-active-high;
1674*4882a593Smuzhiyun
1675*4882a593Smuzhiyun		i2c-thermtrip {
1676*4882a593Smuzhiyun			nvidia,i2c-controller-id = <4>;
1677*4882a593Smuzhiyun			nvidia,bus-addr = <0x40>;
1678*4882a593Smuzhiyun			nvidia,reg-addr = <0x36>;
1679*4882a593Smuzhiyun			nvidia,reg-data = <0x2>;
1680*4882a593Smuzhiyun		};
1681*4882a593Smuzhiyun	};
1682*4882a593Smuzhiyun
1683*4882a593Smuzhiyun	/* Serial ATA */
1684*4882a593Smuzhiyun	sata@70020000 {
1685*4882a593Smuzhiyun		status = "okay";
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1688*4882a593Smuzhiyun		phy-names = "sata-0";
1689*4882a593Smuzhiyun
1690*4882a593Smuzhiyun		hvdd-supply = <&vdd_3v3_lp0>;
1691*4882a593Smuzhiyun		vddio-supply = <&vdd_1v05_run>;
1692*4882a593Smuzhiyun		avdd-supply = <&vdd_1v05_run>;
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun		target-5v-supply = <&vdd_5v0_sata>;
1695*4882a593Smuzhiyun		target-12v-supply = <&vdd_12v0_sata>;
1696*4882a593Smuzhiyun	};
1697*4882a593Smuzhiyun
1698*4882a593Smuzhiyun	hda@70030000 {
1699*4882a593Smuzhiyun		status = "okay";
1700*4882a593Smuzhiyun	};
1701*4882a593Smuzhiyun
1702*4882a593Smuzhiyun	usb@70090000 {
1703*4882a593Smuzhiyun		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* Micro A/B */
1704*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Mini PCIe */
1705*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* USB3 */
1706*4882a593Smuzhiyun		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; /* USB3 */
1707*4882a593Smuzhiyun		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
1708*4882a593Smuzhiyun
1709*4882a593Smuzhiyun		avddio-pex-supply = <&vdd_1v05_run>;
1710*4882a593Smuzhiyun		dvddio-pex-supply = <&vdd_1v05_run>;
1711*4882a593Smuzhiyun		avdd-usb-supply = <&vdd_3v3_lp0>;
1712*4882a593Smuzhiyun		avdd-pll-utmip-supply = <&vddio_1v8>;
1713*4882a593Smuzhiyun		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1714*4882a593Smuzhiyun		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
1715*4882a593Smuzhiyun		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
1716*4882a593Smuzhiyun		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun		status = "okay";
1719*4882a593Smuzhiyun	};
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun	padctl@7009f000 {
1722*4882a593Smuzhiyun		status = "okay";
1723*4882a593Smuzhiyun
1724*4882a593Smuzhiyun		avdd-pll-utmip-supply = <&vddio_1v8>;
1725*4882a593Smuzhiyun		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1726*4882a593Smuzhiyun		avdd-pex-pll-supply = <&vdd_1v05_run>;
1727*4882a593Smuzhiyun		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
1728*4882a593Smuzhiyun
1729*4882a593Smuzhiyun		pads {
1730*4882a593Smuzhiyun			usb2 {
1731*4882a593Smuzhiyun				status = "okay";
1732*4882a593Smuzhiyun
1733*4882a593Smuzhiyun				lanes {
1734*4882a593Smuzhiyun					usb2-0 {
1735*4882a593Smuzhiyun						nvidia,function = "snps";
1736*4882a593Smuzhiyun						status = "okay";
1737*4882a593Smuzhiyun					};
1738*4882a593Smuzhiyun
1739*4882a593Smuzhiyun					usb2-1 {
1740*4882a593Smuzhiyun						nvidia,function = "xusb";
1741*4882a593Smuzhiyun						status = "okay";
1742*4882a593Smuzhiyun					};
1743*4882a593Smuzhiyun
1744*4882a593Smuzhiyun					usb2-2 {
1745*4882a593Smuzhiyun						nvidia,function = "xusb";
1746*4882a593Smuzhiyun						status = "okay";
1747*4882a593Smuzhiyun					};
1748*4882a593Smuzhiyun				};
1749*4882a593Smuzhiyun			};
1750*4882a593Smuzhiyun
1751*4882a593Smuzhiyun			pcie {
1752*4882a593Smuzhiyun				status = "okay";
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun				lanes {
1755*4882a593Smuzhiyun					pcie-0 {
1756*4882a593Smuzhiyun						nvidia,function = "usb3-ss";
1757*4882a593Smuzhiyun						status = "okay";
1758*4882a593Smuzhiyun					};
1759*4882a593Smuzhiyun
1760*4882a593Smuzhiyun					pcie-2 {
1761*4882a593Smuzhiyun						nvidia,function = "pcie";
1762*4882a593Smuzhiyun						status = "okay";
1763*4882a593Smuzhiyun					};
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun					pcie-4 {
1766*4882a593Smuzhiyun						nvidia,function = "pcie";
1767*4882a593Smuzhiyun						status = "okay";
1768*4882a593Smuzhiyun					};
1769*4882a593Smuzhiyun				};
1770*4882a593Smuzhiyun			};
1771*4882a593Smuzhiyun
1772*4882a593Smuzhiyun			sata {
1773*4882a593Smuzhiyun				status = "okay";
1774*4882a593Smuzhiyun
1775*4882a593Smuzhiyun				lanes {
1776*4882a593Smuzhiyun					sata-0 {
1777*4882a593Smuzhiyun						nvidia,function = "sata";
1778*4882a593Smuzhiyun						status = "okay";
1779*4882a593Smuzhiyun					};
1780*4882a593Smuzhiyun				};
1781*4882a593Smuzhiyun			};
1782*4882a593Smuzhiyun		};
1783*4882a593Smuzhiyun
1784*4882a593Smuzhiyun		ports {
1785*4882a593Smuzhiyun			/* Micro A/B */
1786*4882a593Smuzhiyun			usb2-0 {
1787*4882a593Smuzhiyun				status = "okay";
1788*4882a593Smuzhiyun				mode = "host";
1789*4882a593Smuzhiyun			};
1790*4882a593Smuzhiyun
1791*4882a593Smuzhiyun			/* Mini PCIe */
1792*4882a593Smuzhiyun			usb2-1 {
1793*4882a593Smuzhiyun				status = "okay";
1794*4882a593Smuzhiyun				mode = "host";
1795*4882a593Smuzhiyun			};
1796*4882a593Smuzhiyun
1797*4882a593Smuzhiyun			/* USB3 */
1798*4882a593Smuzhiyun			usb2-2 {
1799*4882a593Smuzhiyun				status = "okay";
1800*4882a593Smuzhiyun				mode = "host";
1801*4882a593Smuzhiyun
1802*4882a593Smuzhiyun				vbus-supply = <&vdd_usb3_vbus>;
1803*4882a593Smuzhiyun			};
1804*4882a593Smuzhiyun
1805*4882a593Smuzhiyun			usb3-0 {
1806*4882a593Smuzhiyun				nvidia,usb2-companion = <2>;
1807*4882a593Smuzhiyun				status = "okay";
1808*4882a593Smuzhiyun			};
1809*4882a593Smuzhiyun		};
1810*4882a593Smuzhiyun	};
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun	/* SD card */
1813*4882a593Smuzhiyun	mmc@700b0400 {
1814*4882a593Smuzhiyun		status = "okay";
1815*4882a593Smuzhiyun		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1816*4882a593Smuzhiyun		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1817*4882a593Smuzhiyun		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1818*4882a593Smuzhiyun		bus-width = <4>;
1819*4882a593Smuzhiyun		vqmmc-supply = <&vddio_sdmmc3>;
1820*4882a593Smuzhiyun	};
1821*4882a593Smuzhiyun
1822*4882a593Smuzhiyun	/* eMMC */
1823*4882a593Smuzhiyun	mmc@700b0600 {
1824*4882a593Smuzhiyun		status = "okay";
1825*4882a593Smuzhiyun		bus-width = <8>;
1826*4882a593Smuzhiyun		non-removable;
1827*4882a593Smuzhiyun	};
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun	/* CPU DFLL clock */
1830*4882a593Smuzhiyun	clock@70110000 {
1831*4882a593Smuzhiyun		status = "okay";
1832*4882a593Smuzhiyun		vdd-cpu-supply = <&vdd_cpu>;
1833*4882a593Smuzhiyun		nvidia,i2c-fs-rate = <400000>;
1834*4882a593Smuzhiyun	};
1835*4882a593Smuzhiyun
1836*4882a593Smuzhiyun	ahub@70300000 {
1837*4882a593Smuzhiyun		i2s@70301100 {
1838*4882a593Smuzhiyun			status = "okay";
1839*4882a593Smuzhiyun		};
1840*4882a593Smuzhiyun	};
1841*4882a593Smuzhiyun
1842*4882a593Smuzhiyun	usb@7d000000 {
1843*4882a593Smuzhiyun		compatible = "nvidia,tegra124-udc";
1844*4882a593Smuzhiyun		status = "okay";
1845*4882a593Smuzhiyun		dr_mode = "peripheral";
1846*4882a593Smuzhiyun	};
1847*4882a593Smuzhiyun
1848*4882a593Smuzhiyun	usb-phy@7d000000 {
1849*4882a593Smuzhiyun		status = "okay";
1850*4882a593Smuzhiyun	};
1851*4882a593Smuzhiyun
1852*4882a593Smuzhiyun	/* mini-PCIe USB */
1853*4882a593Smuzhiyun	usb@7d004000 {
1854*4882a593Smuzhiyun		status = "okay";
1855*4882a593Smuzhiyun	};
1856*4882a593Smuzhiyun
1857*4882a593Smuzhiyun	usb-phy@7d004000 {
1858*4882a593Smuzhiyun		status = "okay";
1859*4882a593Smuzhiyun	};
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun	/* USB A connector */
1862*4882a593Smuzhiyun	usb@7d008000 {
1863*4882a593Smuzhiyun		status = "okay";
1864*4882a593Smuzhiyun	};
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun	usb-phy@7d008000 {
1867*4882a593Smuzhiyun		status = "okay";
1868*4882a593Smuzhiyun		vbus-supply = <&vdd_usb3_vbus>;
1869*4882a593Smuzhiyun	};
1870*4882a593Smuzhiyun
1871*4882a593Smuzhiyun	clk32k_in: clock@0 {
1872*4882a593Smuzhiyun		compatible = "fixed-clock";
1873*4882a593Smuzhiyun		clock-frequency = <32768>;
1874*4882a593Smuzhiyun		#clock-cells = <0>;
1875*4882a593Smuzhiyun	};
1876*4882a593Smuzhiyun
1877*4882a593Smuzhiyun	cpus {
1878*4882a593Smuzhiyun		cpu@0 {
1879*4882a593Smuzhiyun			vdd-cpu-supply = <&vdd_cpu>;
1880*4882a593Smuzhiyun		};
1881*4882a593Smuzhiyun	};
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun	gpio-keys {
1884*4882a593Smuzhiyun		compatible = "gpio-keys";
1885*4882a593Smuzhiyun
1886*4882a593Smuzhiyun		power {
1887*4882a593Smuzhiyun			label = "Power";
1888*4882a593Smuzhiyun			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1889*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
1890*4882a593Smuzhiyun			debounce-interval = <10>;
1891*4882a593Smuzhiyun			wakeup-source;
1892*4882a593Smuzhiyun		};
1893*4882a593Smuzhiyun	};
1894*4882a593Smuzhiyun
1895*4882a593Smuzhiyun	vdd_mux: regulator@0 {
1896*4882a593Smuzhiyun		compatible = "regulator-fixed";
1897*4882a593Smuzhiyun		regulator-name = "+VDD_MUX";
1898*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
1899*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
1900*4882a593Smuzhiyun		regulator-always-on;
1901*4882a593Smuzhiyun		regulator-boot-on;
1902*4882a593Smuzhiyun	};
1903*4882a593Smuzhiyun
1904*4882a593Smuzhiyun	vdd_5v0_sys: regulator@1 {
1905*4882a593Smuzhiyun		compatible = "regulator-fixed";
1906*4882a593Smuzhiyun		regulator-name = "+5V_SYS";
1907*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1908*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1909*4882a593Smuzhiyun		regulator-always-on;
1910*4882a593Smuzhiyun		regulator-boot-on;
1911*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
1912*4882a593Smuzhiyun	};
1913*4882a593Smuzhiyun
1914*4882a593Smuzhiyun	vdd_3v3_sys: regulator@2 {
1915*4882a593Smuzhiyun		compatible = "regulator-fixed";
1916*4882a593Smuzhiyun		regulator-name = "+3.3V_SYS";
1917*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1918*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1919*4882a593Smuzhiyun		regulator-always-on;
1920*4882a593Smuzhiyun		regulator-boot-on;
1921*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
1922*4882a593Smuzhiyun	};
1923*4882a593Smuzhiyun
1924*4882a593Smuzhiyun	vdd_3v3_run: regulator@3 {
1925*4882a593Smuzhiyun		compatible = "regulator-fixed";
1926*4882a593Smuzhiyun		regulator-name = "+3.3V_RUN";
1927*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1928*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1929*4882a593Smuzhiyun		regulator-always-on;
1930*4882a593Smuzhiyun		regulator-boot-on;
1931*4882a593Smuzhiyun		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1932*4882a593Smuzhiyun		enable-active-high;
1933*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_sys>;
1934*4882a593Smuzhiyun	};
1935*4882a593Smuzhiyun
1936*4882a593Smuzhiyun	vdd_3v3_hdmi: regulator@4 {
1937*4882a593Smuzhiyun		compatible = "regulator-fixed";
1938*4882a593Smuzhiyun		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1939*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1940*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1941*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_run>;
1942*4882a593Smuzhiyun	};
1943*4882a593Smuzhiyun
1944*4882a593Smuzhiyun	vdd_usb1_vbus: regulator@5 {
1945*4882a593Smuzhiyun		compatible = "regulator-fixed";
1946*4882a593Smuzhiyun		regulator-name = "+USB0_VBUS_SW";
1947*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1948*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1949*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1950*4882a593Smuzhiyun		enable-active-high;
1951*4882a593Smuzhiyun		gpio-open-drain;
1952*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1953*4882a593Smuzhiyun	};
1954*4882a593Smuzhiyun
1955*4882a593Smuzhiyun	vdd_usb3_vbus: regulator@6 {
1956*4882a593Smuzhiyun		compatible = "regulator-fixed";
1957*4882a593Smuzhiyun		regulator-name = "+5V_USB_HS";
1958*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1959*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1960*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1961*4882a593Smuzhiyun		enable-active-high;
1962*4882a593Smuzhiyun		gpio-open-drain;
1963*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1964*4882a593Smuzhiyun	};
1965*4882a593Smuzhiyun
1966*4882a593Smuzhiyun	vdd_3v3_lp0: regulator@7 {
1967*4882a593Smuzhiyun		compatible = "regulator-fixed";
1968*4882a593Smuzhiyun		regulator-name = "+3.3V_LP0";
1969*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
1970*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
1971*4882a593Smuzhiyun		regulator-always-on;
1972*4882a593Smuzhiyun		regulator-boot-on;
1973*4882a593Smuzhiyun		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1974*4882a593Smuzhiyun		enable-active-high;
1975*4882a593Smuzhiyun		vin-supply = <&vdd_3v3_sys>;
1976*4882a593Smuzhiyun	};
1977*4882a593Smuzhiyun
1978*4882a593Smuzhiyun	vdd_hdmi_pll: regulator@8 {
1979*4882a593Smuzhiyun		compatible = "regulator-fixed";
1980*4882a593Smuzhiyun		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1981*4882a593Smuzhiyun		regulator-min-microvolt = <1050000>;
1982*4882a593Smuzhiyun		regulator-max-microvolt = <1050000>;
1983*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1984*4882a593Smuzhiyun		vin-supply = <&vdd_1v05_run>;
1985*4882a593Smuzhiyun	};
1986*4882a593Smuzhiyun
1987*4882a593Smuzhiyun	vdd_5v0_hdmi: regulator@9 {
1988*4882a593Smuzhiyun		compatible = "regulator-fixed";
1989*4882a593Smuzhiyun		regulator-name = "+5V_HDMI_CON";
1990*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
1991*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
1992*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1993*4882a593Smuzhiyun		enable-active-high;
1994*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
1995*4882a593Smuzhiyun	};
1996*4882a593Smuzhiyun
1997*4882a593Smuzhiyun	/* Molex power connector */
1998*4882a593Smuzhiyun	vdd_5v0_sata: regulator@10 {
1999*4882a593Smuzhiyun		compatible = "regulator-fixed";
2000*4882a593Smuzhiyun		regulator-name = "+5V_SATA";
2001*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
2002*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
2003*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2004*4882a593Smuzhiyun		enable-active-high;
2005*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_sys>;
2006*4882a593Smuzhiyun	};
2007*4882a593Smuzhiyun
2008*4882a593Smuzhiyun	vdd_12v0_sata: regulator@11 {
2009*4882a593Smuzhiyun		compatible = "regulator-fixed";
2010*4882a593Smuzhiyun		regulator-name = "+12V_SATA";
2011*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
2012*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
2013*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2014*4882a593Smuzhiyun		enable-active-high;
2015*4882a593Smuzhiyun		vin-supply = <&vdd_mux>;
2016*4882a593Smuzhiyun	};
2017*4882a593Smuzhiyun
2018*4882a593Smuzhiyun	sound {
2019*4882a593Smuzhiyun		compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
2020*4882a593Smuzhiyun			     "nvidia,tegra-audio-rt5640";
2021*4882a593Smuzhiyun		nvidia,model = "NVIDIA Tegra Jetson TK1";
2022*4882a593Smuzhiyun
2023*4882a593Smuzhiyun		nvidia,audio-routing =
2024*4882a593Smuzhiyun			"Headphones", "HPOR",
2025*4882a593Smuzhiyun			"Headphones", "HPOL",
2026*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
2027*4882a593Smuzhiyun			"IN2P", "Mic Jack";
2028*4882a593Smuzhiyun
2029*4882a593Smuzhiyun		nvidia,i2s-controller = <&tegra_i2s1>;
2030*4882a593Smuzhiyun		nvidia,audio-codec = <&rt5639>;
2031*4882a593Smuzhiyun
2032*4882a593Smuzhiyun		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2035*4882a593Smuzhiyun			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2036*4882a593Smuzhiyun			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2037*4882a593Smuzhiyun		clock-names = "pll_a", "pll_a_out0", "mclk";
2038*4882a593Smuzhiyun
2039*4882a593Smuzhiyun		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2040*4882a593Smuzhiyun				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2041*4882a593Smuzhiyun
2042*4882a593Smuzhiyun		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2043*4882a593Smuzhiyun					 <&tegra_car TEGRA124_CLK_EXTERN1>;
2044*4882a593Smuzhiyun	};
2045*4882a593Smuzhiyun
2046*4882a593Smuzhiyun	thermal-zones {
2047*4882a593Smuzhiyun		cpu {
2048*4882a593Smuzhiyun			trips {
2049*4882a593Smuzhiyun				cpu-shutdown-trip {
2050*4882a593Smuzhiyun					temperature = <101000>;
2051*4882a593Smuzhiyun					hysteresis = <0>;
2052*4882a593Smuzhiyun					type = "critical";
2053*4882a593Smuzhiyun				};
2054*4882a593Smuzhiyun			};
2055*4882a593Smuzhiyun		};
2056*4882a593Smuzhiyun
2057*4882a593Smuzhiyun		mem {
2058*4882a593Smuzhiyun			trips {
2059*4882a593Smuzhiyun				mem-shutdown-trip {
2060*4882a593Smuzhiyun					temperature = <101000>;
2061*4882a593Smuzhiyun					hysteresis = <0>;
2062*4882a593Smuzhiyun					type = "critical";
2063*4882a593Smuzhiyun				};
2064*4882a593Smuzhiyun			};
2065*4882a593Smuzhiyun		};
2066*4882a593Smuzhiyun
2067*4882a593Smuzhiyun		gpu {
2068*4882a593Smuzhiyun			trips {
2069*4882a593Smuzhiyun				gpu-shutdown-trip {
2070*4882a593Smuzhiyun					temperature = <101000>;
2071*4882a593Smuzhiyun					hysteresis = <0>;
2072*4882a593Smuzhiyun					type = "critical";
2073*4882a593Smuzhiyun				};
2074*4882a593Smuzhiyun			};
2075*4882a593Smuzhiyun		};
2076*4882a593Smuzhiyun	};
2077*4882a593Smuzhiyun};
2078