xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2015 Tyler Baker
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Tyler Baker <tyler.baker@linaro.org>
5*4882a593Smuzhiyun * Chen-Yu Tsai <wens@csie.org>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
8*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
9*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
10*4882a593Smuzhiyun * whole.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
13*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
14*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
15*4882a593Smuzhiyun *     License, or (at your option) any later version.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
18*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20*4882a593Smuzhiyun *     GNU General Public License for more details.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Or, alternatively,
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
25*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
26*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
27*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
28*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
29*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
30*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
31*4882a593Smuzhiyun *     conditions:
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
34*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun/dts-v1/;
47*4882a593Smuzhiyun#include "sun9i-a80.dtsi"
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun/ {
52*4882a593Smuzhiyun	model = "Cubietech Cubieboard4";
53*4882a593Smuzhiyun	compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	aliases {
56*4882a593Smuzhiyun		serial0 = &uart0;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	chosen {
60*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	leds {
64*4882a593Smuzhiyun		compatible = "gpio-leds";
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		green {
67*4882a593Smuzhiyun			label = "cubieboard4:green:usr";
68*4882a593Smuzhiyun			gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		red {
72*4882a593Smuzhiyun			label = "cubieboard4:red:usr";
73*4882a593Smuzhiyun			gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	vga-connector {
78*4882a593Smuzhiyun		compatible = "vga-connector";
79*4882a593Smuzhiyun		label = "vga";
80*4882a593Smuzhiyun		ddc-i2c-bus = <&i2c3>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		port {
83*4882a593Smuzhiyun			vga_con_in: endpoint {
84*4882a593Smuzhiyun				remote-endpoint = <&vga_dac_out>;
85*4882a593Smuzhiyun			};
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	vga-dac {
90*4882a593Smuzhiyun		compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
91*4882a593Smuzhiyun		vdd-supply = <&reg_dcdc1>;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun		ports {
94*4882a593Smuzhiyun			#address-cells = <1>;
95*4882a593Smuzhiyun			#size-cells = <0>;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			port@0 {
98*4882a593Smuzhiyun				reg = <0>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun				vga_dac_in: endpoint {
101*4882a593Smuzhiyun					remote-endpoint = <&tcon0_out_vga>;
102*4882a593Smuzhiyun				};
103*4882a593Smuzhiyun			};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun			port@1 {
106*4882a593Smuzhiyun				reg = <1>;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun				vga_dac_out: endpoint {
109*4882a593Smuzhiyun					remote-endpoint = <&vga_con_in>;
110*4882a593Smuzhiyun				};
111*4882a593Smuzhiyun			};
112*4882a593Smuzhiyun		};
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	wifi_pwrseq: wifi-pwrseq {
116*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
117*4882a593Smuzhiyun		clocks = <&ac100_rtc 1>;
118*4882a593Smuzhiyun		clock-names = "ext_clock";
119*4882a593Smuzhiyun		/* enables internal regulator and de-asserts reset */
120*4882a593Smuzhiyun		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&de {
125*4882a593Smuzhiyun	status = "okay";
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&gmac {
129*4882a593Smuzhiyun	pinctrl-names = "default";
130*4882a593Smuzhiyun	pinctrl-0 = <&gmac_rgmii_pins>;
131*4882a593Smuzhiyun	phy-handle = <&phy1>;
132*4882a593Smuzhiyun	phy-mode = "rgmii-id";
133*4882a593Smuzhiyun	phy-supply = <&reg_cldo1>;
134*4882a593Smuzhiyun	status = "okay";
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&i2c3 {
138*4882a593Smuzhiyun	pinctrl-names = "default";
139*4882a593Smuzhiyun	pinctrl-0 = <&i2c3_pins>;
140*4882a593Smuzhiyun	status = "okay";
141*4882a593Smuzhiyun};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun&mdio {
144*4882a593Smuzhiyun	phy1: ethernet-phy@1 {
145*4882a593Smuzhiyun		reg = <1>;
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun&mmc0 {
150*4882a593Smuzhiyun	pinctrl-names = "default";
151*4882a593Smuzhiyun	pinctrl-0 = <&mmc0_pins>;
152*4882a593Smuzhiyun	vmmc-supply = <&reg_dcdc1>;
153*4882a593Smuzhiyun	bus-width = <4>;
154*4882a593Smuzhiyun	cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
155*4882a593Smuzhiyun	status = "okay";
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun&mmc1 {
159*4882a593Smuzhiyun	pinctrl-names = "default";
160*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins>;
161*4882a593Smuzhiyun	vmmc-supply = <&reg_dldo1>;
162*4882a593Smuzhiyun	vqmmc-supply = <&reg_cldo3>;
163*4882a593Smuzhiyun	mmc-pwrseq = <&wifi_pwrseq>;
164*4882a593Smuzhiyun	bus-width = <4>;
165*4882a593Smuzhiyun	non-removable;
166*4882a593Smuzhiyun	status = "okay";
167*4882a593Smuzhiyun};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun&mmc1_pins {
170*4882a593Smuzhiyun	bias-pull-up;
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&mmc2 {
174*4882a593Smuzhiyun	pinctrl-names = "default";
175*4882a593Smuzhiyun	pinctrl-0 = <&mmc2_8bit_pins>;
176*4882a593Smuzhiyun	vmmc-supply = <&reg_dcdc1>;
177*4882a593Smuzhiyun	bus-width = <8>;
178*4882a593Smuzhiyun	non-removable;
179*4882a593Smuzhiyun	cap-mmc-hw-reset;
180*4882a593Smuzhiyun	status = "okay";
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun&mmc2_8bit_pins {
184*4882a593Smuzhiyun	/* Increase drive strength for DDR modes */
185*4882a593Smuzhiyun	drive-strength = <40>;
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&osc32k {
189*4882a593Smuzhiyun	/* osc32k input is from AC100 */
190*4882a593Smuzhiyun	clocks = <&ac100_rtc 0>;
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&pio {
194*4882a593Smuzhiyun	vcc-pa-supply = <&reg_ldo_io1>;
195*4882a593Smuzhiyun	vcc-pb-supply = <&reg_aldo2>;
196*4882a593Smuzhiyun	vcc-pc-supply = <&reg_dcdc1>;
197*4882a593Smuzhiyun	vcc-pd-supply = <&reg_dc1sw>;
198*4882a593Smuzhiyun	vcc-pe-supply = <&reg_eldo2>;
199*4882a593Smuzhiyun	vcc-pf-supply = <&reg_dcdc1>;
200*4882a593Smuzhiyun	vcc-pg-supply = <&reg_ldo_io0>;
201*4882a593Smuzhiyun	vcc-ph-supply = <&reg_dcdc1>;
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&r_ir {
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&r_pio {
209*4882a593Smuzhiyun	vcc-pl-supply = <&reg_dldo2>;
210*4882a593Smuzhiyun	vcc-pm-supply = <&reg_eldo3>;
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&r_rsb {
214*4882a593Smuzhiyun	status = "okay";
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun	axp809: pmic@3a3 {
217*4882a593Smuzhiyun		reg = <0x3a3>;
218*4882a593Smuzhiyun		interrupt-parent = <&nmi_intc>;
219*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		regulators {
222*4882a593Smuzhiyun			reg_aldo1: aldo1 {
223*4882a593Smuzhiyun				/*
224*4882a593Smuzhiyun				 * TODO: This should be handled by the
225*4882a593Smuzhiyun				 * USB PHY driver.
226*4882a593Smuzhiyun				 */
227*4882a593Smuzhiyun				regulator-always-on;
228*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
229*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
230*4882a593Smuzhiyun				regulator-name = "vcc33-usbh";
231*4882a593Smuzhiyun			};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun			reg_aldo2: aldo2 {
234*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
235*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
236*4882a593Smuzhiyun				regulator-name = "vcc-pb-io-cam";
237*4882a593Smuzhiyun			};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun			aldo3 {
240*4882a593Smuzhiyun				/* unused */
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun			reg_dc1sw: dc1sw {
244*4882a593Smuzhiyun				regulator-name = "vcc-pd";
245*4882a593Smuzhiyun			};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun			reg_dc5ldo: dc5ldo {
248*4882a593Smuzhiyun				regulator-always-on;
249*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
250*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
251*4882a593Smuzhiyun				regulator-name = "vdd-cpus-09-usbh";
252*4882a593Smuzhiyun			};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun			reg_dcdc1: dcdc1 {
255*4882a593Smuzhiyun				regulator-always-on;
256*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
257*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
258*4882a593Smuzhiyun				regulator-name = "vcc-3v";
259*4882a593Smuzhiyun			};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun			reg_dcdc2: dcdc2 {
262*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
263*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
264*4882a593Smuzhiyun				regulator-name = "vdd-gpu";
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun			reg_dcdc3: dcdc3 {
268*4882a593Smuzhiyun				regulator-always-on;
269*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
270*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
271*4882a593Smuzhiyun				regulator-name = "vdd-cpua";
272*4882a593Smuzhiyun			};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun			reg_dcdc4: dcdc4 {
275*4882a593Smuzhiyun				regulator-always-on;
276*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
277*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
278*4882a593Smuzhiyun				regulator-name = "vdd-sys-usb0-hdmi";
279*4882a593Smuzhiyun			};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun			reg_dcdc5: dcdc5 {
282*4882a593Smuzhiyun				regulator-always-on;
283*4882a593Smuzhiyun				regulator-min-microvolt = <1425000>;
284*4882a593Smuzhiyun				regulator-max-microvolt = <1575000>;
285*4882a593Smuzhiyun				regulator-name = "vcc-dram";
286*4882a593Smuzhiyun			};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun			reg_dldo1: dldo1 {
289*4882a593Smuzhiyun				/*
290*4882a593Smuzhiyun				 * The WiFi chip supports a wide range
291*4882a593Smuzhiyun				 * (3.0 ~ 4.8V) of voltages, and so does
292*4882a593Smuzhiyun				 * this regulator (3.0 ~ 4.2V), but
293*4882a593Smuzhiyun				 * Allwinner SDK always sets it to 3.3V.
294*4882a593Smuzhiyun				 */
295*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
296*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
297*4882a593Smuzhiyun				regulator-name = "vcc-wifi";
298*4882a593Smuzhiyun			};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun			reg_dldo2: dldo2 {
301*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
302*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
303*4882a593Smuzhiyun				regulator-name = "vcc-pl";
304*4882a593Smuzhiyun			};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun			reg_eldo1: eldo1 {
307*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
308*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
309*4882a593Smuzhiyun				regulator-name = "vcc-dvdd-cam";
310*4882a593Smuzhiyun			};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun			reg_eldo2: eldo2 {
313*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
314*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
315*4882a593Smuzhiyun				regulator-name = "vcc-pe";
316*4882a593Smuzhiyun			};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun			reg_eldo3: eldo3 {
319*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
320*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
321*4882a593Smuzhiyun				regulator-name = "vcc-pm-codec-io1";
322*4882a593Smuzhiyun			};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun			reg_ldo_io0: ldo_io0 {
325*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
326*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
327*4882a593Smuzhiyun				regulator-name = "vcc-pg";
328*4882a593Smuzhiyun			};
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun			reg_ldo_io1: ldo_io1 {
331*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
332*4882a593Smuzhiyun				regulator-max-microvolt = <2500000>;
333*4882a593Smuzhiyun				regulator-name = "vcc-pa-gmac-2v5";
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			reg_rtc_ldo: rtc_ldo {
337*4882a593Smuzhiyun				regulator-name = "vcc-rtc-vdd1v8-io";
338*4882a593Smuzhiyun			};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun			sw {
341*4882a593Smuzhiyun				/* unused */
342*4882a593Smuzhiyun			};
343*4882a593Smuzhiyun		};
344*4882a593Smuzhiyun	};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun	axp806: pmic@745 {
347*4882a593Smuzhiyun		compatible = "x-powers,axp806";
348*4882a593Smuzhiyun		reg = <0x745>;
349*4882a593Smuzhiyun		interrupt-parent = <&nmi_intc>;
350*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
351*4882a593Smuzhiyun		interrupt-controller;
352*4882a593Smuzhiyun		#interrupt-cells = <1>;
353*4882a593Smuzhiyun		bldoin-supply = <&reg_dcdce>;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun		regulators {
356*4882a593Smuzhiyun			reg_s_aldo1: aldo1 {
357*4882a593Smuzhiyun				regulator-always-on;
358*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
359*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
360*4882a593Smuzhiyun				regulator-name = "avcc";
361*4882a593Smuzhiyun			};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun			aldo2 {
364*4882a593Smuzhiyun				/*
365*4882a593Smuzhiyun				 * unused, but use a different name to
366*4882a593Smuzhiyun				 * avoid name clash with axp809's aldo's
367*4882a593Smuzhiyun				 */
368*4882a593Smuzhiyun				regulator-name = "s_aldo2";
369*4882a593Smuzhiyun			};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun			aldo3 {
372*4882a593Smuzhiyun				/*
373*4882a593Smuzhiyun				 * unused, but use a different name to
374*4882a593Smuzhiyun				 * avoid name clash with axp809's aldo's
375*4882a593Smuzhiyun				 */
376*4882a593Smuzhiyun				regulator-name = "s_aldo3";
377*4882a593Smuzhiyun			};
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun			reg_bldo1: bldo1 {
380*4882a593Smuzhiyun				regulator-always-on;
381*4882a593Smuzhiyun				regulator-min-microvolt = <1700000>;
382*4882a593Smuzhiyun				regulator-max-microvolt = <1900000>;
383*4882a593Smuzhiyun				regulator-name = "vcc18-efuse-adc-display-csi";
384*4882a593Smuzhiyun			};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun			reg_bldo2: bldo2 {
387*4882a593Smuzhiyun				regulator-always-on;
388*4882a593Smuzhiyun				regulator-min-microvolt = <1700000>;
389*4882a593Smuzhiyun				regulator-max-microvolt = <1900000>;
390*4882a593Smuzhiyun				regulator-name =
391*4882a593Smuzhiyun					"vdd18-drampll-vcc18-pll-cpvdd";
392*4882a593Smuzhiyun			};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun			bldo3 {
395*4882a593Smuzhiyun				/* unused */
396*4882a593Smuzhiyun			};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun			reg_bldo4: bldo4 {
399*4882a593Smuzhiyun				regulator-min-microvolt = <1100000>;
400*4882a593Smuzhiyun				regulator-max-microvolt = <1300000>;
401*4882a593Smuzhiyun				regulator-name = "vcc12-hsic";
402*4882a593Smuzhiyun			};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun			reg_cldo1: cldo1 {
405*4882a593Smuzhiyun				/*
406*4882a593Smuzhiyun				 * This was 3V in the original design, but
407*4882a593Smuzhiyun				 * 3.3V is the recommended supply voltage
408*4882a593Smuzhiyun				 * for the Ethernet PHY.
409*4882a593Smuzhiyun				 */
410*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
411*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
412*4882a593Smuzhiyun				/*
413*4882a593Smuzhiyun				 * The PHY requires 20ms after all voltages
414*4882a593Smuzhiyun				 * are applied until core logic is ready and
415*4882a593Smuzhiyun				 * 30ms after the reset pin is de-asserted.
416*4882a593Smuzhiyun				 * Set a 100ms delay to account for PMIC
417*4882a593Smuzhiyun				 * ramp time and board traces.
418*4882a593Smuzhiyun				 */
419*4882a593Smuzhiyun				regulator-enable-ramp-delay = <100000>;
420*4882a593Smuzhiyun				regulator-name = "vcc-gmac-phy";
421*4882a593Smuzhiyun			};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun			reg_cldo2: cldo2 {
424*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
425*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
426*4882a593Smuzhiyun				regulator-name = "afvcc-cam";
427*4882a593Smuzhiyun			};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun			reg_cldo3: cldo3 {
430*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
431*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
432*4882a593Smuzhiyun				regulator-name = "vcc-io-wifi-codec-io2";
433*4882a593Smuzhiyun			};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun			reg_dcdca: dcdca {
436*4882a593Smuzhiyun				regulator-always-on;
437*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
438*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
439*4882a593Smuzhiyun				regulator-name = "vdd-cpub";
440*4882a593Smuzhiyun			};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun			reg_dcdcd: dcdcd {
443*4882a593Smuzhiyun				regulator-always-on;
444*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
445*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
446*4882a593Smuzhiyun				regulator-name = "vdd-vpu";
447*4882a593Smuzhiyun			};
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun			reg_dcdce: dcdce {
450*4882a593Smuzhiyun				regulator-always-on;
451*4882a593Smuzhiyun				regulator-min-microvolt = <2100000>;
452*4882a593Smuzhiyun				regulator-max-microvolt = <2100000>;
453*4882a593Smuzhiyun				regulator-name = "vcc-bldo-codec-ldoin";
454*4882a593Smuzhiyun			};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun			sw {
457*4882a593Smuzhiyun				/*
458*4882a593Smuzhiyun				 * unused, but use a different name to
459*4882a593Smuzhiyun				 * avoid name clash with axp809's sw
460*4882a593Smuzhiyun				 */
461*4882a593Smuzhiyun				regulator-name = "s_sw";
462*4882a593Smuzhiyun			};
463*4882a593Smuzhiyun		};
464*4882a593Smuzhiyun	};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun	ac100: codec@e89 {
467*4882a593Smuzhiyun		compatible = "x-powers,ac100";
468*4882a593Smuzhiyun		reg = <0xe89>;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun		ac100_codec: codec {
471*4882a593Smuzhiyun			compatible = "x-powers,ac100-codec";
472*4882a593Smuzhiyun			interrupt-parent = <&r_pio>;
473*4882a593Smuzhiyun			interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
474*4882a593Smuzhiyun			#clock-cells = <0>;
475*4882a593Smuzhiyun			clock-output-names = "4M_adda";
476*4882a593Smuzhiyun		};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun		ac100_rtc: rtc {
479*4882a593Smuzhiyun			compatible = "x-powers,ac100-rtc";
480*4882a593Smuzhiyun			interrupt-parent = <&nmi_intc>;
481*4882a593Smuzhiyun			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
482*4882a593Smuzhiyun			clocks = <&ac100_codec>;
483*4882a593Smuzhiyun			#clock-cells = <1>;
484*4882a593Smuzhiyun			clock-output-names = "cko1_rtc",
485*4882a593Smuzhiyun					     "cko2_rtc",
486*4882a593Smuzhiyun					     "cko3_rtc";
487*4882a593Smuzhiyun		};
488*4882a593Smuzhiyun	};
489*4882a593Smuzhiyun};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun#include "axp809.dtsi"
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun&tcon0 {
494*4882a593Smuzhiyun	pinctrl-names = "default";
495*4882a593Smuzhiyun	pinctrl-0 = <&lcd0_rgb888_pins>;
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&tcon0_out {
499*4882a593Smuzhiyun	tcon0_out_vga: endpoint {
500*4882a593Smuzhiyun		remote-endpoint = <&vga_dac_in>;
501*4882a593Smuzhiyun	};
502*4882a593Smuzhiyun};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun&uart0 {
505*4882a593Smuzhiyun	pinctrl-names = "default";
506*4882a593Smuzhiyun	pinctrl-0 = <&uart0_ph_pins>;
507*4882a593Smuzhiyun	status = "okay";
508*4882a593Smuzhiyun};
509