1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2019 Bootlin 4*4882a593Smuzhiyun * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "sun8i-h3.dtsi" 9*4882a593Smuzhiyun#include "sunxi-common-regulators.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 12*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun model = "RerVision H3-DVK"; 16*4882a593Smuzhiyun compatible = "rervision,h3-dvk", "allwinner,sun8i-h3"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun aliases { 19*4882a593Smuzhiyun ethernet0 = &emac; 20*4882a593Smuzhiyun serial0 = &uart0; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun chosen { 24*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun connector { 28*4882a593Smuzhiyun compatible = "hdmi-connector"; 29*4882a593Smuzhiyun type = "a"; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun port { 32*4882a593Smuzhiyun hdmi_con_in: endpoint { 33*4882a593Smuzhiyun remote-endpoint = <&hdmi_out_con>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&de { 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&ehci1 { 44*4882a593Smuzhiyun status = "okay"; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&ehci2 { 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&ehci3 { 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&emac { 56*4882a593Smuzhiyun phy-handle = <&int_mii_phy>; 57*4882a593Smuzhiyun phy-mode = "mii"; 58*4882a593Smuzhiyun allwinner,leds-active-low; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&hdmi { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun&hdmi_out { 67*4882a593Smuzhiyun hdmi_out_con: endpoint { 68*4882a593Smuzhiyun remote-endpoint = <&hdmi_con_in>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&mmc0 { 73*4882a593Smuzhiyun bus-width = <4>; 74*4882a593Smuzhiyun cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun vmmc-supply = <®_vcc3v3>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&mmc2 { 80*4882a593Smuzhiyun pinctrl-names = "default"; 81*4882a593Smuzhiyun pinctrl-0 = <&mmc2_8bit_pins>; 82*4882a593Smuzhiyun vmmc-supply = <®_vcc3v3>; 83*4882a593Smuzhiyun bus-width = <8>; 84*4882a593Smuzhiyun non-removable; 85*4882a593Smuzhiyun cap-mmc-hw-reset; 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&ohci1 { 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&ohci2 { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&ohci3 { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&uart0 { 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&uart0_pa_pins>; 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&usb_otg { 108*4882a593Smuzhiyun status = "okay"; 109*4882a593Smuzhiyun dr_mode = "peripheral"; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&usbphy { 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun}; 115