xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
4*4882a593Smuzhiyun * Copyright (C) 2020 Ahmad Fatoum, Pengutronix
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "stm32mp15-pinctrl.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/mfd/st,stpmic1.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	reserved-memory {
13*4882a593Smuzhiyun		#address-cells = <1>;
14*4882a593Smuzhiyun		#size-cells = <1>;
15*4882a593Smuzhiyun		ranges;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun		mcuram2: mcuram2@10000000 {
18*4882a593Smuzhiyun			compatible = "shared-dma-pool";
19*4882a593Smuzhiyun			reg = <0x10000000 0x40000>;
20*4882a593Smuzhiyun			no-map;
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		vdev0vring0: vdev0vring0@10040000 {
24*4882a593Smuzhiyun			compatible = "shared-dma-pool";
25*4882a593Smuzhiyun			reg = <0x10040000 0x1000>;
26*4882a593Smuzhiyun			no-map;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		vdev0vring1: vdev0vring1@10041000 {
30*4882a593Smuzhiyun			compatible = "shared-dma-pool";
31*4882a593Smuzhiyun			reg = <0x10041000 0x1000>;
32*4882a593Smuzhiyun			no-map;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		vdev0buffer: vdev0buffer@10042000 {
36*4882a593Smuzhiyun			compatible = "shared-dma-pool";
37*4882a593Smuzhiyun			reg = <0x10042000 0x4000>;
38*4882a593Smuzhiyun			no-map;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		mcuram: mcuram@30000000 {
42*4882a593Smuzhiyun			compatible = "shared-dma-pool";
43*4882a593Smuzhiyun			reg = <0x30000000 0x40000>;
44*4882a593Smuzhiyun			no-map;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		retram: retram@38000000 {
48*4882a593Smuzhiyun			compatible = "shared-dma-pool";
49*4882a593Smuzhiyun			reg = <0x38000000 0x10000>;
50*4882a593Smuzhiyun			no-map;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	reg_sip_eeprom: regulator_eeprom {
55*4882a593Smuzhiyun		compatible = "regulator-fixed";
56*4882a593Smuzhiyun		regulator-name = "sip_eeprom";
57*4882a593Smuzhiyun		regulator-always-on;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun&i2c4 {
62*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
63*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_pins_a>;
64*4882a593Smuzhiyun	pinctrl-1 = <&i2c4_sleep_pins_a>;
65*4882a593Smuzhiyun	clock-frequency = <400000>;
66*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <185>;
67*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
68*4882a593Smuzhiyun	status = "okay";
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	pmic: stpmic@33 {
71*4882a593Smuzhiyun		compatible = "st,stpmic1";
72*4882a593Smuzhiyun		reg = <0x33>;
73*4882a593Smuzhiyun		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
74*4882a593Smuzhiyun		interrupt-controller;
75*4882a593Smuzhiyun		#interrupt-cells = <2>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		regulators {
78*4882a593Smuzhiyun			compatible = "st,stpmic1-regulators";
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun			ldo1-supply = <&v3v3>;
81*4882a593Smuzhiyun			ldo6-supply = <&v3v3>;
82*4882a593Smuzhiyun			pwr_sw1-supply = <&bst_out>;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun			vddcore: buck1 {
85*4882a593Smuzhiyun				regulator-name = "vddcore";
86*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
87*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
88*4882a593Smuzhiyun				regulator-always-on;
89*4882a593Smuzhiyun				regulator-initial-mode = <0>;
90*4882a593Smuzhiyun				regulator-over-current-protection;
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun			vdd_ddr: buck2 {
94*4882a593Smuzhiyun				regulator-name = "vdd_ddr";
95*4882a593Smuzhiyun				regulator-min-microvolt = <1350000>;
96*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
97*4882a593Smuzhiyun				regulator-always-on;
98*4882a593Smuzhiyun				regulator-initial-mode = <0>;
99*4882a593Smuzhiyun				regulator-over-current-protection;
100*4882a593Smuzhiyun			};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun			vdd: buck3 {
103*4882a593Smuzhiyun				regulator-name = "vdd";
104*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
105*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
106*4882a593Smuzhiyun				regulator-always-on;
107*4882a593Smuzhiyun				st,mask-reset;
108*4882a593Smuzhiyun				regulator-initial-mode = <0>;
109*4882a593Smuzhiyun				regulator-over-current-protection;
110*4882a593Smuzhiyun			};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			v3v3: buck4 {
113*4882a593Smuzhiyun				regulator-name = "v3v3";
114*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
115*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
116*4882a593Smuzhiyun				regulator-always-on;
117*4882a593Smuzhiyun				regulator-over-current-protection;
118*4882a593Smuzhiyun				regulator-initial-mode = <0>;
119*4882a593Smuzhiyun			};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun			v1v8_audio: ldo1 {
122*4882a593Smuzhiyun				regulator-name = "v1v8_audio";
123*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
124*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
125*4882a593Smuzhiyun				regulator-always-on;
126*4882a593Smuzhiyun				interrupts = <IT_CURLIM_LDO1 0>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun			v3v3_hdmi: ldo2 {
131*4882a593Smuzhiyun				regulator-name = "v3v3_hdmi";
132*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
133*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
134*4882a593Smuzhiyun				regulator-always-on;
135*4882a593Smuzhiyun				interrupts = <IT_CURLIM_LDO2 0>;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun			vtt_ddr: ldo3 {
140*4882a593Smuzhiyun				regulator-name = "vtt_ddr";
141*4882a593Smuzhiyun				regulator-min-microvolt = <500000>;
142*4882a593Smuzhiyun				regulator-max-microvolt = <750000>;
143*4882a593Smuzhiyun				regulator-always-on;
144*4882a593Smuzhiyun				regulator-over-current-protection;
145*4882a593Smuzhiyun			};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun			vdd_usb: ldo4 {
148*4882a593Smuzhiyun				regulator-name = "vdd_usb";
149*4882a593Smuzhiyun				interrupts = <IT_CURLIM_LDO4 0>;
150*4882a593Smuzhiyun			};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun			vdda: ldo5 {
153*4882a593Smuzhiyun				regulator-name = "vdda";
154*4882a593Smuzhiyun				regulator-min-microvolt = <2900000>;
155*4882a593Smuzhiyun				regulator-max-microvolt = <2900000>;
156*4882a593Smuzhiyun				interrupts = <IT_CURLIM_LDO5 0>;
157*4882a593Smuzhiyun				regulator-boot-on;
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun			v1v2_hdmi: ldo6 {
161*4882a593Smuzhiyun				regulator-name = "v1v2_hdmi";
162*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
163*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
164*4882a593Smuzhiyun				regulator-always-on;
165*4882a593Smuzhiyun				interrupts = <IT_CURLIM_LDO6 0>;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun			};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun			vref_ddr: vref_ddr {
170*4882a593Smuzhiyun				regulator-name = "vref_ddr";
171*4882a593Smuzhiyun				regulator-always-on;
172*4882a593Smuzhiyun			};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun			bst_out: boost {
175*4882a593Smuzhiyun				regulator-name = "bst_out";
176*4882a593Smuzhiyun				interrupts = <IT_OCP_BOOST 0>;
177*4882a593Smuzhiyun			};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun			vbus_otg: pwr_sw1 {
180*4882a593Smuzhiyun				regulator-name = "vbus_otg";
181*4882a593Smuzhiyun				interrupts = <IT_OCP_OTG 0>;
182*4882a593Smuzhiyun				regulator-active-discharge = <1>;
183*4882a593Smuzhiyun			};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun			vbus_sw: pwr_sw2 {
186*4882a593Smuzhiyun				regulator-name = "vbus_sw";
187*4882a593Smuzhiyun				interrupts = <IT_OCP_SWOUT 0>;
188*4882a593Smuzhiyun				regulator-active-discharge = <1>;
189*4882a593Smuzhiyun			};
190*4882a593Smuzhiyun		};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun		onkey {
193*4882a593Smuzhiyun			compatible = "st,stpmic1-onkey";
194*4882a593Smuzhiyun			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
195*4882a593Smuzhiyun			interrupt-names = "onkey-falling", "onkey-rising";
196*4882a593Smuzhiyun		};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		pmic_watchdog: watchdog {
199*4882a593Smuzhiyun			compatible = "st,stpmic1-wdt";
200*4882a593Smuzhiyun			status = "disabled";
201*4882a593Smuzhiyun		};
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	sip_eeprom: eeprom@50 {
205*4882a593Smuzhiyun		compatible = "atmel,24c32";
206*4882a593Smuzhiyun		vcc-supply = <&reg_sip_eeprom>;
207*4882a593Smuzhiyun		reg = <0x50>;
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&ipcc {
212*4882a593Smuzhiyun	status = "okay";
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&m4_rproc {
216*4882a593Smuzhiyun	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
217*4882a593Smuzhiyun			<&vdev0vring1>, <&vdev0buffer>;
218*4882a593Smuzhiyun	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
219*4882a593Smuzhiyun	mbox-names = "vq0", "vq1", "shutdown";
220*4882a593Smuzhiyun	interrupt-parent = <&exti>;
221*4882a593Smuzhiyun	interrupts = <68 1>;
222*4882a593Smuzhiyun	status = "okay";
223*4882a593Smuzhiyun};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun&rng1 {
226*4882a593Smuzhiyun	status = "okay";
227*4882a593Smuzhiyun};
228