1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "stm32mp15-pinctrl.dtsi" 7*4882a593Smuzhiyun#include "stm32mp15xxaa-pinctrl.dtsi" 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include <dt-bindings/mfd/st,stpmic1.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun aliases { 13*4882a593Smuzhiyun ethernet0 = ðernet0; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@c0000000 { 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun reg = <0xC0000000 0x40000000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun reserved-memory { 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <1>; 24*4882a593Smuzhiyun ranges; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun mcuram2: mcuram2@10000000 { 27*4882a593Smuzhiyun compatible = "shared-dma-pool"; 28*4882a593Smuzhiyun reg = <0x10000000 0x40000>; 29*4882a593Smuzhiyun no-map; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun vdev0vring0: vdev0vring0@10040000 { 33*4882a593Smuzhiyun compatible = "shared-dma-pool"; 34*4882a593Smuzhiyun reg = <0x10040000 0x1000>; 35*4882a593Smuzhiyun no-map; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun vdev0vring1: vdev0vring1@10041000 { 39*4882a593Smuzhiyun compatible = "shared-dma-pool"; 40*4882a593Smuzhiyun reg = <0x10041000 0x1000>; 41*4882a593Smuzhiyun no-map; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun vdev0buffer: vdev0buffer@10042000 { 45*4882a593Smuzhiyun compatible = "shared-dma-pool"; 46*4882a593Smuzhiyun reg = <0x10042000 0x4000>; 47*4882a593Smuzhiyun no-map; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun mcuram: mcuram@30000000 { 51*4882a593Smuzhiyun compatible = "shared-dma-pool"; 52*4882a593Smuzhiyun reg = <0x30000000 0x40000>; 53*4882a593Smuzhiyun no-map; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun retram: retram@38000000 { 57*4882a593Smuzhiyun compatible = "shared-dma-pool"; 58*4882a593Smuzhiyun reg = <0x38000000 0x10000>; 59*4882a593Smuzhiyun no-map; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun ethernet_vio: vioregulator { 64*4882a593Smuzhiyun compatible = "regulator-fixed"; 65*4882a593Smuzhiyun regulator-name = "vio"; 66*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 67*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 68*4882a593Smuzhiyun gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; 69*4882a593Smuzhiyun regulator-always-on; 70*4882a593Smuzhiyun regulator-boot-on; 71*4882a593Smuzhiyun vin-supply = <&vdd>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&adc { 76*4882a593Smuzhiyun vdd-supply = <&vdd>; 77*4882a593Smuzhiyun vdda-supply = <&vdda>; 78*4882a593Smuzhiyun vref-supply = <&vdda>; 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun adc1: adc@0 { 82*4882a593Smuzhiyun st,min-sample-time-nsecs = <5000>; 83*4882a593Smuzhiyun st,adc-channels = <0>; 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun adc2: adc@100 { 88*4882a593Smuzhiyun st,adc-channels = <1>; 89*4882a593Smuzhiyun st,min-sample-time-nsecs = <5000>; 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&dac { 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; 97*4882a593Smuzhiyun vref-supply = <&vdda>; 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun dac1: dac@1 { 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun dac2: dac@2 { 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&dts { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyunðernet0 { 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun pinctrl-0 = <ðernet0_rmii_pins_a>; 115*4882a593Smuzhiyun pinctrl-1 = <ðernet0_rmii_sleep_pins_a>; 116*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 117*4882a593Smuzhiyun phy-mode = "rmii"; 118*4882a593Smuzhiyun max-speed = <100>; 119*4882a593Smuzhiyun phy-handle = <&phy0>; 120*4882a593Smuzhiyun st,eth-ref-clk-sel; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun mdio0 { 123*4882a593Smuzhiyun #address-cells = <1>; 124*4882a593Smuzhiyun #size-cells = <0>; 125*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun phy0: ethernet-phy@1 { 128*4882a593Smuzhiyun reg = <1>; 129*4882a593Smuzhiyun /* LAN8710Ai */ 130*4882a593Smuzhiyun compatible = "ethernet-phy-id0007.c0f0", 131*4882a593Smuzhiyun "ethernet-phy-ieee802.3-c22"; 132*4882a593Smuzhiyun clocks = <&rcc ETHCK_K>; 133*4882a593Smuzhiyun reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; 134*4882a593Smuzhiyun reset-assert-us = <500>; 135*4882a593Smuzhiyun reset-deassert-us = <500>; 136*4882a593Smuzhiyun smsc,disable-energy-detect; 137*4882a593Smuzhiyun interrupt-parent = <&gpioi>; 138*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&i2c4 { 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins_a>; 146*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 147*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 148*4882a593Smuzhiyun status = "okay"; 149*4882a593Smuzhiyun /* spare dmas for other usage */ 150*4882a593Smuzhiyun /delete-property/dmas; 151*4882a593Smuzhiyun /delete-property/dma-names; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun rtc@32 { 154*4882a593Smuzhiyun compatible = "microcrystal,rv8803"; 155*4882a593Smuzhiyun reg = <0x32>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun pmic: stpmic@33 { 159*4882a593Smuzhiyun compatible = "st,stpmic1"; 160*4882a593Smuzhiyun reg = <0x33>; 161*4882a593Smuzhiyun interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 162*4882a593Smuzhiyun interrupt-controller; 163*4882a593Smuzhiyun #interrupt-cells = <2>; 164*4882a593Smuzhiyun status = "okay"; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun regulators { 167*4882a593Smuzhiyun compatible = "st,stpmic1-regulators"; 168*4882a593Smuzhiyun ldo1-supply = <&v3v3>; 169*4882a593Smuzhiyun ldo2-supply = <&v3v3>; 170*4882a593Smuzhiyun ldo3-supply = <&vdd_ddr>; 171*4882a593Smuzhiyun ldo5-supply = <&v3v3>; 172*4882a593Smuzhiyun ldo6-supply = <&v3v3>; 173*4882a593Smuzhiyun pwr_sw1-supply = <&bst_out>; 174*4882a593Smuzhiyun pwr_sw2-supply = <&bst_out>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun vddcore: buck1 { 177*4882a593Smuzhiyun regulator-name = "vddcore"; 178*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 179*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 180*4882a593Smuzhiyun regulator-always-on; 181*4882a593Smuzhiyun regulator-initial-mode = <0>; 182*4882a593Smuzhiyun regulator-over-current-protection; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun vdd_ddr: buck2 { 186*4882a593Smuzhiyun regulator-name = "vdd_ddr"; 187*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 188*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 189*4882a593Smuzhiyun regulator-always-on; 190*4882a593Smuzhiyun regulator-initial-mode = <0>; 191*4882a593Smuzhiyun regulator-over-current-protection; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun vdd: buck3 { 195*4882a593Smuzhiyun regulator-name = "vdd"; 196*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 197*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 198*4882a593Smuzhiyun regulator-always-on; 199*4882a593Smuzhiyun st,mask-reset; 200*4882a593Smuzhiyun regulator-initial-mode = <0>; 201*4882a593Smuzhiyun regulator-over-current-protection; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun v3v3: buck4 { 205*4882a593Smuzhiyun regulator-name = "v3v3"; 206*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun regulator-over-current-protection; 210*4882a593Smuzhiyun regulator-initial-mode = <0>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun vdda: ldo1 { 214*4882a593Smuzhiyun regulator-name = "vdda"; 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-min-microvolt = <2900000>; 217*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 218*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO1 0>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun v2v8: ldo2 { 222*4882a593Smuzhiyun regulator-name = "v2v8"; 223*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 224*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 225*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO2 0>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun vtt_ddr: ldo3 { 229*4882a593Smuzhiyun regulator-name = "vtt_ddr"; 230*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 231*4882a593Smuzhiyun regulator-max-microvolt = <750000>; 232*4882a593Smuzhiyun regulator-always-on; 233*4882a593Smuzhiyun regulator-over-current-protection; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun vdd_usb: ldo4 { 237*4882a593Smuzhiyun regulator-name = "vdd_usb"; 238*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO4 0>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun vdd_sd: ldo5 { 242*4882a593Smuzhiyun regulator-name = "vdd_sd"; 243*4882a593Smuzhiyun regulator-min-microvolt = <2900000>; 244*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 245*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO5 0>; 246*4882a593Smuzhiyun regulator-boot-on; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun v1v8: ldo6 { 250*4882a593Smuzhiyun regulator-name = "v1v8"; 251*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 252*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 253*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO6 0>; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun vref_ddr: vref_ddr { 257*4882a593Smuzhiyun regulator-name = "vref_ddr"; 258*4882a593Smuzhiyun regulator-always-on; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun bst_out: boost { 262*4882a593Smuzhiyun regulator-name = "bst_out"; 263*4882a593Smuzhiyun interrupts = <IT_OCP_BOOST 0>; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun vbus_otg: pwr_sw1 { 267*4882a593Smuzhiyun regulator-name = "vbus_otg"; 268*4882a593Smuzhiyun interrupts = <IT_OCP_OTG 0>; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun vbus_sw: pwr_sw2 { 272*4882a593Smuzhiyun regulator-name = "vbus_sw"; 273*4882a593Smuzhiyun interrupts = <IT_OCP_SWOUT 0>; 274*4882a593Smuzhiyun regulator-active-discharge = <1>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun onkey { 279*4882a593Smuzhiyun compatible = "st,stpmic1-onkey"; 280*4882a593Smuzhiyun interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; 281*4882a593Smuzhiyun interrupt-names = "onkey-falling", "onkey-rising"; 282*4882a593Smuzhiyun power-off-time-sec = <10>; 283*4882a593Smuzhiyun status = "okay"; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun watchdog { 287*4882a593Smuzhiyun compatible = "st,stpmic1-wdt"; 288*4882a593Smuzhiyun status = "disabled"; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun touchscreen@49 { 293*4882a593Smuzhiyun compatible = "ti,tsc2004"; 294*4882a593Smuzhiyun reg = <0x49>; 295*4882a593Smuzhiyun vio-supply = <&v3v3>; 296*4882a593Smuzhiyun interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun eeprom@50 { 300*4882a593Smuzhiyun compatible = "atmel,24c02"; 301*4882a593Smuzhiyun reg = <0x50>; 302*4882a593Smuzhiyun pagesize = <16>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun}; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun&ipcc { 307*4882a593Smuzhiyun status = "okay"; 308*4882a593Smuzhiyun}; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun&iwdg2 { 311*4882a593Smuzhiyun timeout-sec = <32>; 312*4882a593Smuzhiyun status = "okay"; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&m4_rproc { 316*4882a593Smuzhiyun memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 317*4882a593Smuzhiyun <&vdev0vring1>, <&vdev0buffer>; 318*4882a593Smuzhiyun mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 319*4882a593Smuzhiyun mbox-names = "vq0", "vq1", "shutdown"; 320*4882a593Smuzhiyun interrupt-parent = <&exti>; 321*4882a593Smuzhiyun interrupts = <68 1>; 322*4882a593Smuzhiyun status = "okay"; 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&pwr_regulators { 326*4882a593Smuzhiyun vdd-supply = <&vdd>; 327*4882a593Smuzhiyun vdd_3v3_usbfs-supply = <&vdd_usb>; 328*4882a593Smuzhiyun}; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun&qspi { 331*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 332*4882a593Smuzhiyun pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; 333*4882a593Smuzhiyun pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; 334*4882a593Smuzhiyun reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; 335*4882a593Smuzhiyun #address-cells = <1>; 336*4882a593Smuzhiyun #size-cells = <0>; 337*4882a593Smuzhiyun status = "okay"; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun flash0: flash@0 { 340*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 341*4882a593Smuzhiyun reg = <0>; 342*4882a593Smuzhiyun spi-rx-bus-width = <4>; 343*4882a593Smuzhiyun spi-max-frequency = <108000000>; 344*4882a593Smuzhiyun #address-cells = <1>; 345*4882a593Smuzhiyun #size-cells = <1>; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun}; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun&rng1 { 350*4882a593Smuzhiyun status = "okay"; 351*4882a593Smuzhiyun}; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun&rtc { 354*4882a593Smuzhiyun status = "okay"; 355*4882a593Smuzhiyun}; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun&sdmmc1 { 358*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 359*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 360*4882a593Smuzhiyun pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; 361*4882a593Smuzhiyun pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; 362*4882a593Smuzhiyun cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 363*4882a593Smuzhiyun disable-wp; 364*4882a593Smuzhiyun st,sig-dir; 365*4882a593Smuzhiyun st,neg-edge; 366*4882a593Smuzhiyun st,use-ckin; 367*4882a593Smuzhiyun bus-width = <4>; 368*4882a593Smuzhiyun vmmc-supply = <&vdd_sd>; 369*4882a593Smuzhiyun status = "okay"; 370*4882a593Smuzhiyun}; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun&sdmmc2 { 373*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 374*4882a593Smuzhiyun pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 375*4882a593Smuzhiyun pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; 376*4882a593Smuzhiyun pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; 377*4882a593Smuzhiyun non-removable; 378*4882a593Smuzhiyun no-sd; 379*4882a593Smuzhiyun no-sdio; 380*4882a593Smuzhiyun st,neg-edge; 381*4882a593Smuzhiyun bus-width = <8>; 382*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 383*4882a593Smuzhiyun vqmmc-supply = <&v3v3>; 384*4882a593Smuzhiyun mmc-ddr-3_3v; 385*4882a593Smuzhiyun status = "okay"; 386*4882a593Smuzhiyun}; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun&sdmmc3 { 389*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 390*4882a593Smuzhiyun pinctrl-0 = <&sdmmc3_b4_pins_a>; 391*4882a593Smuzhiyun pinctrl-1 = <&sdmmc3_b4_od_pins_a>; 392*4882a593Smuzhiyun pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; 393*4882a593Smuzhiyun broken-cd; 394*4882a593Smuzhiyun st,neg-edge; 395*4882a593Smuzhiyun bus-width = <4>; 396*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 397*4882a593Smuzhiyun vqmmc-supply = <&v3v3>; 398*4882a593Smuzhiyun mmc-ddr-3_3v; 399*4882a593Smuzhiyun status = "okay"; 400*4882a593Smuzhiyun}; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun&uart4 { 403*4882a593Smuzhiyun pinctrl-names = "default"; 404*4882a593Smuzhiyun pinctrl-0 = <&uart4_pins_a>; 405*4882a593Smuzhiyun status = "okay"; 406*4882a593Smuzhiyun}; 407