1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 4*4882a593Smuzhiyun * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "stm32mp157.dtsi" 9*4882a593Smuzhiyun#include "stm32mp15xc.dtsi" 10*4882a593Smuzhiyun#include "stm32mp15-pinctrl.dtsi" 11*4882a593Smuzhiyun#include "stm32mp15xxaa-pinctrl.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 13*4882a593Smuzhiyun#include <dt-bindings/mfd/st,stpmic1.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "STMicroelectronics STM32MP157C eval daughter"; 17*4882a593Smuzhiyun compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun chosen { 20*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun memory@c0000000 { 24*4882a593Smuzhiyun device_type = "memory"; 25*4882a593Smuzhiyun reg = <0xC0000000 0x40000000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun reserved-memory { 29*4882a593Smuzhiyun #address-cells = <1>; 30*4882a593Smuzhiyun #size-cells = <1>; 31*4882a593Smuzhiyun ranges; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun mcuram2: mcuram2@10000000 { 34*4882a593Smuzhiyun compatible = "shared-dma-pool"; 35*4882a593Smuzhiyun reg = <0x10000000 0x40000>; 36*4882a593Smuzhiyun no-map; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun vdev0vring0: vdev0vring0@10040000 { 40*4882a593Smuzhiyun compatible = "shared-dma-pool"; 41*4882a593Smuzhiyun reg = <0x10040000 0x1000>; 42*4882a593Smuzhiyun no-map; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun vdev0vring1: vdev0vring1@10041000 { 46*4882a593Smuzhiyun compatible = "shared-dma-pool"; 47*4882a593Smuzhiyun reg = <0x10041000 0x1000>; 48*4882a593Smuzhiyun no-map; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vdev0buffer: vdev0buffer@10042000 { 52*4882a593Smuzhiyun compatible = "shared-dma-pool"; 53*4882a593Smuzhiyun reg = <0x10042000 0x4000>; 54*4882a593Smuzhiyun no-map; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun mcuram: mcuram@30000000 { 58*4882a593Smuzhiyun compatible = "shared-dma-pool"; 59*4882a593Smuzhiyun reg = <0x30000000 0x40000>; 60*4882a593Smuzhiyun no-map; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun retram: retram@38000000 { 64*4882a593Smuzhiyun compatible = "shared-dma-pool"; 65*4882a593Smuzhiyun reg = <0x38000000 0x10000>; 66*4882a593Smuzhiyun no-map; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun gpu_reserved: gpu@e8000000 { 70*4882a593Smuzhiyun reg = <0xe8000000 0x8000000>; 71*4882a593Smuzhiyun no-map; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun aliases { 76*4882a593Smuzhiyun serial0 = &uart4; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun sd_switch: regulator-sd_switch { 80*4882a593Smuzhiyun compatible = "regulator-gpio"; 81*4882a593Smuzhiyun regulator-name = "sd_switch"; 82*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 83*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 84*4882a593Smuzhiyun regulator-type = "voltage"; 85*4882a593Smuzhiyun regulator-always-on; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; 88*4882a593Smuzhiyun gpios-states = <0>; 89*4882a593Smuzhiyun states = <1800000 0x1>, 90*4882a593Smuzhiyun <2900000 0x0>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun vin: vin { 94*4882a593Smuzhiyun compatible = "regulator-fixed"; 95*4882a593Smuzhiyun regulator-name = "vin"; 96*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 97*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 98*4882a593Smuzhiyun regulator-always-on; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun}; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun&adc { 103*4882a593Smuzhiyun /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */ 104*4882a593Smuzhiyun pinctrl-0 = <&adc1_in6_pins_a>; 105*4882a593Smuzhiyun pinctrl-names = "default"; 106*4882a593Smuzhiyun vdd-supply = <&vdd>; 107*4882a593Smuzhiyun vdda-supply = <&vdda>; 108*4882a593Smuzhiyun vref-supply = <&vdda>; 109*4882a593Smuzhiyun status = "disabled"; 110*4882a593Smuzhiyun adc1: adc@0 { 111*4882a593Smuzhiyun st,adc-channels = <0 1 6>; 112*4882a593Smuzhiyun /* 16.5 ck_cycles sampling time */ 113*4882a593Smuzhiyun st,min-sample-time-nsecs = <400>; 114*4882a593Smuzhiyun status = "okay"; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&dac { 119*4882a593Smuzhiyun pinctrl-names = "default"; 120*4882a593Smuzhiyun pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; 121*4882a593Smuzhiyun vref-supply = <&vdda>; 122*4882a593Smuzhiyun status = "disabled"; 123*4882a593Smuzhiyun dac1: dac@1 { 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun dac2: dac@2 { 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&dts { 132*4882a593Smuzhiyun status = "okay"; 133*4882a593Smuzhiyun}; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun&gpu { 136*4882a593Smuzhiyun contiguous-area = <&gpu_reserved>; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&i2c4 { 140*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 141*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins_a>; 142*4882a593Smuzhiyun pinctrl-1 = <&i2c4_sleep_pins_a>; 143*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 144*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 145*4882a593Smuzhiyun clock-frequency = <400000>; 146*4882a593Smuzhiyun status = "okay"; 147*4882a593Smuzhiyun /* spare dmas for other usage */ 148*4882a593Smuzhiyun /delete-property/dmas; 149*4882a593Smuzhiyun /delete-property/dma-names; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun pmic: stpmic@33 { 152*4882a593Smuzhiyun compatible = "st,stpmic1"; 153*4882a593Smuzhiyun reg = <0x33>; 154*4882a593Smuzhiyun interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 155*4882a593Smuzhiyun interrupt-controller; 156*4882a593Smuzhiyun #interrupt-cells = <2>; 157*4882a593Smuzhiyun status = "okay"; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun regulators { 160*4882a593Smuzhiyun compatible = "st,stpmic1-regulators"; 161*4882a593Smuzhiyun buck1-supply = <&vin>; 162*4882a593Smuzhiyun buck2-supply = <&vin>; 163*4882a593Smuzhiyun buck3-supply = <&vin>; 164*4882a593Smuzhiyun buck4-supply = <&vin>; 165*4882a593Smuzhiyun ldo1-supply = <&v3v3>; 166*4882a593Smuzhiyun ldo2-supply = <&v3v3>; 167*4882a593Smuzhiyun ldo3-supply = <&vdd_ddr>; 168*4882a593Smuzhiyun ldo4-supply = <&vin>; 169*4882a593Smuzhiyun ldo5-supply = <&v3v3>; 170*4882a593Smuzhiyun ldo6-supply = <&v3v3>; 171*4882a593Smuzhiyun vref_ddr-supply = <&vin>; 172*4882a593Smuzhiyun boost-supply = <&vin>; 173*4882a593Smuzhiyun pwr_sw1-supply = <&bst_out>; 174*4882a593Smuzhiyun pwr_sw2-supply = <&bst_out>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun vddcore: buck1 { 177*4882a593Smuzhiyun regulator-name = "vddcore"; 178*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 179*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 180*4882a593Smuzhiyun regulator-always-on; 181*4882a593Smuzhiyun regulator-initial-mode = <0>; 182*4882a593Smuzhiyun regulator-over-current-protection; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun vdd_ddr: buck2 { 186*4882a593Smuzhiyun regulator-name = "vdd_ddr"; 187*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 188*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 189*4882a593Smuzhiyun regulator-always-on; 190*4882a593Smuzhiyun regulator-initial-mode = <0>; 191*4882a593Smuzhiyun regulator-over-current-protection; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun vdd: buck3 { 195*4882a593Smuzhiyun regulator-name = "vdd"; 196*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 197*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 198*4882a593Smuzhiyun regulator-always-on; 199*4882a593Smuzhiyun st,mask-reset; 200*4882a593Smuzhiyun regulator-initial-mode = <0>; 201*4882a593Smuzhiyun regulator-over-current-protection; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun v3v3: buck4 { 205*4882a593Smuzhiyun regulator-name = "v3v3"; 206*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun regulator-over-current-protection; 210*4882a593Smuzhiyun regulator-initial-mode = <0>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun vdda: ldo1 { 214*4882a593Smuzhiyun regulator-name = "vdda"; 215*4882a593Smuzhiyun regulator-min-microvolt = <2900000>; 216*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 217*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO1 0>; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun v2v8: ldo2 { 221*4882a593Smuzhiyun regulator-name = "v2v8"; 222*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 223*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 224*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO2 0>; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun vtt_ddr: ldo3 { 228*4882a593Smuzhiyun regulator-name = "vtt_ddr"; 229*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 230*4882a593Smuzhiyun regulator-max-microvolt = <750000>; 231*4882a593Smuzhiyun regulator-always-on; 232*4882a593Smuzhiyun regulator-over-current-protection; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vdd_usb: ldo4 { 236*4882a593Smuzhiyun regulator-name = "vdd_usb"; 237*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO4 0>; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun vdd_sd: ldo5 { 241*4882a593Smuzhiyun regulator-name = "vdd_sd"; 242*4882a593Smuzhiyun regulator-min-microvolt = <2900000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 244*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO5 0>; 245*4882a593Smuzhiyun regulator-boot-on; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun v1v8: ldo6 { 249*4882a593Smuzhiyun regulator-name = "v1v8"; 250*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 251*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 252*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO6 0>; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun vref_ddr: vref_ddr { 256*4882a593Smuzhiyun regulator-name = "vref_ddr"; 257*4882a593Smuzhiyun regulator-always-on; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun bst_out: boost { 261*4882a593Smuzhiyun regulator-name = "bst_out"; 262*4882a593Smuzhiyun interrupts = <IT_OCP_BOOST 0>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun vbus_otg: pwr_sw1 { 266*4882a593Smuzhiyun regulator-name = "vbus_otg"; 267*4882a593Smuzhiyun interrupts = <IT_OCP_OTG 0>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun vbus_sw: pwr_sw2 { 271*4882a593Smuzhiyun regulator-name = "vbus_sw"; 272*4882a593Smuzhiyun interrupts = <IT_OCP_SWOUT 0>; 273*4882a593Smuzhiyun regulator-active-discharge = <1>; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun onkey { 278*4882a593Smuzhiyun compatible = "st,stpmic1-onkey"; 279*4882a593Smuzhiyun interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; 280*4882a593Smuzhiyun interrupt-names = "onkey-falling", "onkey-rising"; 281*4882a593Smuzhiyun power-off-time-sec = <10>; 282*4882a593Smuzhiyun status = "okay"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun watchdog { 286*4882a593Smuzhiyun compatible = "st,stpmic1-wdt"; 287*4882a593Smuzhiyun status = "disabled"; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&ipcc { 293*4882a593Smuzhiyun status = "okay"; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&iwdg2 { 297*4882a593Smuzhiyun timeout-sec = <32>; 298*4882a593Smuzhiyun status = "okay"; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun&m4_rproc { 302*4882a593Smuzhiyun memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 303*4882a593Smuzhiyun <&vdev0vring1>, <&vdev0buffer>; 304*4882a593Smuzhiyun mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 305*4882a593Smuzhiyun mbox-names = "vq0", "vq1", "shutdown"; 306*4882a593Smuzhiyun interrupt-parent = <&exti>; 307*4882a593Smuzhiyun interrupts = <68 1>; 308*4882a593Smuzhiyun status = "okay"; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&pwr_regulators { 312*4882a593Smuzhiyun vdd-supply = <&vdd>; 313*4882a593Smuzhiyun vdd_3v3_usbfs-supply = <&vdd_usb>; 314*4882a593Smuzhiyun}; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun&rng1 { 317*4882a593Smuzhiyun status = "okay"; 318*4882a593Smuzhiyun}; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun&rtc { 321*4882a593Smuzhiyun status = "okay"; 322*4882a593Smuzhiyun}; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun&sdmmc1 { 325*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 326*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 327*4882a593Smuzhiyun pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; 328*4882a593Smuzhiyun pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; 329*4882a593Smuzhiyun cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 330*4882a593Smuzhiyun disable-wp; 331*4882a593Smuzhiyun st,sig-dir; 332*4882a593Smuzhiyun st,neg-edge; 333*4882a593Smuzhiyun st,use-ckin; 334*4882a593Smuzhiyun bus-width = <4>; 335*4882a593Smuzhiyun vmmc-supply = <&vdd_sd>; 336*4882a593Smuzhiyun vqmmc-supply = <&sd_switch>; 337*4882a593Smuzhiyun sd-uhs-sdr12; 338*4882a593Smuzhiyun sd-uhs-sdr25; 339*4882a593Smuzhiyun sd-uhs-sdr50; 340*4882a593Smuzhiyun sd-uhs-ddr50; 341*4882a593Smuzhiyun status = "okay"; 342*4882a593Smuzhiyun}; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun&sdmmc2 { 345*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 346*4882a593Smuzhiyun pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 347*4882a593Smuzhiyun pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; 348*4882a593Smuzhiyun pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; 349*4882a593Smuzhiyun non-removable; 350*4882a593Smuzhiyun no-sd; 351*4882a593Smuzhiyun no-sdio; 352*4882a593Smuzhiyun st,neg-edge; 353*4882a593Smuzhiyun bus-width = <8>; 354*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 355*4882a593Smuzhiyun vqmmc-supply = <&vdd>; 356*4882a593Smuzhiyun mmc-ddr-3_3v; 357*4882a593Smuzhiyun status = "okay"; 358*4882a593Smuzhiyun}; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun&timers6 { 361*4882a593Smuzhiyun status = "okay"; 362*4882a593Smuzhiyun /* spare dmas for other usage */ 363*4882a593Smuzhiyun /delete-property/dmas; 364*4882a593Smuzhiyun /delete-property/dma-names; 365*4882a593Smuzhiyun timer@5 { 366*4882a593Smuzhiyun status = "okay"; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun}; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun&uart4 { 371*4882a593Smuzhiyun pinctrl-names = "default", "sleep", "idle"; 372*4882a593Smuzhiyun pinctrl-0 = <&uart4_pins_a>; 373*4882a593Smuzhiyun pinctrl-1 = <&uart4_sleep_pins_a>; 374*4882a593Smuzhiyun pinctrl-2 = <&uart4_idle_pins_a>; 375*4882a593Smuzhiyun status = "okay"; 376*4882a593Smuzhiyun}; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun&usbotg_hs { 379*4882a593Smuzhiyun vbus-supply = <&vbus_otg>; 380*4882a593Smuzhiyun}; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun&usbphyc_port0 { 383*4882a593Smuzhiyun phy-supply = <&vdd_usb>; 384*4882a593Smuzhiyun vdda1v1-supply = <®11>; 385*4882a593Smuzhiyun vdda1v8-supply = <®18>; 386*4882a593Smuzhiyun}; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun&usbphyc_port1 { 389*4882a593Smuzhiyun phy-supply = <&vdd_usb>; 390*4882a593Smuzhiyun vdda1v1-supply = <®11>; 391*4882a593Smuzhiyun vdda1v8-supply = <®18>; 392*4882a593Smuzhiyun}; 393