1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4*4882a593Smuzhiyun * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "stm32mp151.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun cpus { 11*4882a593Smuzhiyun cpu1: cpu@1 { 12*4882a593Smuzhiyun compatible = "arm,cortex-a7"; 13*4882a593Smuzhiyun clock-frequency = <650000000>; 14*4882a593Smuzhiyun device_type = "cpu"; 15*4882a593Smuzhiyun reg = <1>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun arm-pmu { 20*4882a593Smuzhiyun interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 21*4882a593Smuzhiyun <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; 22*4882a593Smuzhiyun interrupt-affinity = <&cpu0>, <&cpu1>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun soc { 26*4882a593Smuzhiyun m_can1: can@4400e000 { 27*4882a593Smuzhiyun compatible = "bosch,m_can"; 28*4882a593Smuzhiyun reg = <0x4400e000 0x400>, <0x44011000 0x1400>; 29*4882a593Smuzhiyun reg-names = "m_can", "message_ram"; 30*4882a593Smuzhiyun interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 31*4882a593Smuzhiyun <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 32*4882a593Smuzhiyun interrupt-names = "int0", "int1"; 33*4882a593Smuzhiyun clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; 34*4882a593Smuzhiyun clock-names = "hclk", "cclk"; 35*4882a593Smuzhiyun bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; 36*4882a593Smuzhiyun status = "disabled"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun m_can2: can@4400f000 { 40*4882a593Smuzhiyun compatible = "bosch,m_can"; 41*4882a593Smuzhiyun reg = <0x4400f000 0x400>, <0x44011000 0x2800>; 42*4882a593Smuzhiyun reg-names = "m_can", "message_ram"; 43*4882a593Smuzhiyun interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 44*4882a593Smuzhiyun <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 45*4882a593Smuzhiyun interrupt-names = "int0", "int1"; 46*4882a593Smuzhiyun clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; 47*4882a593Smuzhiyun clock-names = "hclk", "cclk"; 48*4882a593Smuzhiyun bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; 49*4882a593Smuzhiyun status = "disabled"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53