xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/stm32f429-disco.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun * whole.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
10*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun *     License, or (at your option) any later version.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun *     GNU General Public License for more details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *     You should have received a copy of the GNU General Public
20*4882a593Smuzhiyun *     License along with this file; if not, write to the Free
21*4882a593Smuzhiyun *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22*4882a593Smuzhiyun *     MA 02110-1301 USA
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Or, alternatively,
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
27*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
28*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
29*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
30*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
31*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
32*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
33*4882a593Smuzhiyun *     conditions:
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
36*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun/dts-v1/;
49*4882a593Smuzhiyun#include "stm32f429.dtsi"
50*4882a593Smuzhiyun#include "stm32f429-pinctrl.dtsi"
51*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
52*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
53*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun/ {
56*4882a593Smuzhiyun	model = "STMicroelectronics STM32F429i-DISCO board";
57*4882a593Smuzhiyun	compatible = "st,stm32f429i-disco", "st,stm32f429";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	chosen {
60*4882a593Smuzhiyun		bootargs = "root=/dev/ram";
61*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	memory@90000000 {
65*4882a593Smuzhiyun		device_type = "memory";
66*4882a593Smuzhiyun		reg = <0x90000000 0x800000>;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	aliases {
70*4882a593Smuzhiyun		serial0 = &usart1;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	leds {
74*4882a593Smuzhiyun		compatible = "gpio-leds";
75*4882a593Smuzhiyun		led-red {
76*4882a593Smuzhiyun			gpios = <&gpiog 14 0>;
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun		led-green {
79*4882a593Smuzhiyun			gpios = <&gpiog 13 0>;
80*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	gpio-keys {
85*4882a593Smuzhiyun		compatible = "gpio-keys";
86*4882a593Smuzhiyun		autorepeat;
87*4882a593Smuzhiyun		button-0 {
88*4882a593Smuzhiyun			label = "User";
89*4882a593Smuzhiyun			linux,code = <KEY_HOME>;
90*4882a593Smuzhiyun			gpios = <&gpioa 0 0>;
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	/* This turns on vbus for otg for host mode (dwc2) */
95*4882a593Smuzhiyun	vcc5v_otg: vcc5v-otg-regulator {
96*4882a593Smuzhiyun		compatible = "regulator-fixed";
97*4882a593Smuzhiyun		gpio = <&gpioc 4 0>;
98*4882a593Smuzhiyun		regulator-name = "vcc5_host1";
99*4882a593Smuzhiyun		regulator-always-on;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&clk_hse {
104*4882a593Smuzhiyun	clock-frequency = <8000000>;
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&crc {
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&i2c3 {
112*4882a593Smuzhiyun	pinctrl-names = "default";
113*4882a593Smuzhiyun	pinctrl-0 = <&i2c3_pins>;
114*4882a593Smuzhiyun	clock-frequency = <100000>;
115*4882a593Smuzhiyun	status = "okay";
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	stmpe811@41 {
118*4882a593Smuzhiyun		compatible = "st,stmpe811";
119*4882a593Smuzhiyun		reg = <0x41>;
120*4882a593Smuzhiyun		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
121*4882a593Smuzhiyun		interrupt-parent = <&gpioa>;
122*4882a593Smuzhiyun		/* 3.25 MHz ADC clock speed */
123*4882a593Smuzhiyun		st,adc-freq = <1>;
124*4882a593Smuzhiyun		/* 12-bit ADC */
125*4882a593Smuzhiyun		st,mod-12b = <1>;
126*4882a593Smuzhiyun		/* internal ADC reference */
127*4882a593Smuzhiyun		st,ref-sel = <0>;
128*4882a593Smuzhiyun		/* ADC converstion time: 80 clocks */
129*4882a593Smuzhiyun		st,sample-time = <4>;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		stmpe_touchscreen {
132*4882a593Smuzhiyun			compatible = "st,stmpe-ts";
133*4882a593Smuzhiyun			/* 8 sample average control */
134*4882a593Smuzhiyun			st,ave-ctrl = <3>;
135*4882a593Smuzhiyun			/* 7 length fractional part in z */
136*4882a593Smuzhiyun			st,fraction-z = <7>;
137*4882a593Smuzhiyun			/*
138*4882a593Smuzhiyun			 * 50 mA typical 80 mA max touchscreen drivers
139*4882a593Smuzhiyun			 * current limit value
140*4882a593Smuzhiyun			 */
141*4882a593Smuzhiyun			st,i-drive = <1>;
142*4882a593Smuzhiyun			/* 1 ms panel driver settling time */
143*4882a593Smuzhiyun			st,settling = <3>;
144*4882a593Smuzhiyun			/* 5 ms touch detect interrupt delay */
145*4882a593Smuzhiyun			st,touch-det-delay = <5>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun		stmpe_adc {
149*4882a593Smuzhiyun			compatible = "st,stmpe-adc";
150*4882a593Smuzhiyun			/* forbid to use ADC channels 3-0 (touch) */
151*4882a593Smuzhiyun			st,norequest-mask = <0x0F>;
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&ltdc {
157*4882a593Smuzhiyun	status = "okay";
158*4882a593Smuzhiyun	pinctrl-0 = <&ltdc_pins_b>;
159*4882a593Smuzhiyun	pinctrl-names = "default";
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	port {
162*4882a593Smuzhiyun		ltdc_out_rgb: endpoint {
163*4882a593Smuzhiyun			remote-endpoint = <&panel_in_rgb>;
164*4882a593Smuzhiyun		};
165*4882a593Smuzhiyun	};
166*4882a593Smuzhiyun};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun&rtc {
169*4882a593Smuzhiyun	assigned-clocks = <&rcc 1 CLK_RTC>;
170*4882a593Smuzhiyun	assigned-clock-parents = <&rcc 1 CLK_LSI>;
171*4882a593Smuzhiyun	status = "okay";
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&spi5 {
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun	pinctrl-0 = <&spi5_pins>;
177*4882a593Smuzhiyun	pinctrl-names = "default";
178*4882a593Smuzhiyun	#address-cells = <1>;
179*4882a593Smuzhiyun	#size-cells = <0>;
180*4882a593Smuzhiyun	cs-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>, <&gpioc 2 GPIO_ACTIVE_LOW>;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun	l3gd20: l3gd20@0 {
183*4882a593Smuzhiyun		compatible = "st,l3gd20-gyro";
184*4882a593Smuzhiyun		spi-max-frequency = <10000000>;
185*4882a593Smuzhiyun		st,drdy-int-pin = <2>;
186*4882a593Smuzhiyun		interrupt-parent = <&gpioa>;
187*4882a593Smuzhiyun		interrupts = <1 IRQ_TYPE_EDGE_RISING>,
188*4882a593Smuzhiyun				<2 IRQ_TYPE_EDGE_RISING>;
189*4882a593Smuzhiyun		reg = <0>;
190*4882a593Smuzhiyun		status = "okay";
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	display: display@1{
194*4882a593Smuzhiyun		/* Connect panel-ilitek-9341 to ltdc */
195*4882a593Smuzhiyun		compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
196*4882a593Smuzhiyun		reg = <1>;
197*4882a593Smuzhiyun		spi-3wire;
198*4882a593Smuzhiyun		spi-max-frequency = <10000000>;
199*4882a593Smuzhiyun		dc-gpios = <&gpiod 13 0>;
200*4882a593Smuzhiyun		port {
201*4882a593Smuzhiyun			panel_in_rgb: endpoint {
202*4882a593Smuzhiyun			remote-endpoint = <&ltdc_out_rgb>;
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&usart1 {
209*4882a593Smuzhiyun	pinctrl-0 = <&usart1_pins_a>;
210*4882a593Smuzhiyun	pinctrl-names = "default";
211*4882a593Smuzhiyun	status = "okay";
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun&usbotg_hs {
215*4882a593Smuzhiyun	compatible = "st,stm32f4x9-fsotg";
216*4882a593Smuzhiyun	dr_mode = "host";
217*4882a593Smuzhiyun	pinctrl-0 = <&usbotg_fs_pins_b>;
218*4882a593Smuzhiyun	pinctrl-names = "default";
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221