1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2012 ST-Ericsson AB 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "ste-href-ab8500.dtsi" 7*4882a593Smuzhiyun#include "ste-href.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "ST-Ericsson HREF (v60+) platform with Device Tree"; 11*4882a593Smuzhiyun compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun soc { 14*4882a593Smuzhiyun /* Name the GPIO muxed rails on the HREF boards */ 15*4882a593Smuzhiyun gpio@8012e000 { 16*4882a593Smuzhiyun /* GPIOs 0 - 31 */ 17*4882a593Smuzhiyun gpio-line-names = 18*4882a593Smuzhiyun /* GPIO0,1 used for UART0 BT RX/TX */ 19*4882a593Smuzhiyun "", "", 20*4882a593Smuzhiyun "UART_WAKE", 21*4882a593Smuzhiyun "BT_WAKE", 22*4882a593Smuzhiyun "", 23*4882a593Smuzhiyun "SDMMC_1V8_3V_SEL", 24*4882a593Smuzhiyun "FLASH_LED_SYNC (FLASH_CTRL_0)", 25*4882a593Smuzhiyun "XENON_READY (FLASH_CTRL_1)", 26*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 27*4882a593Smuzhiyun "", "", "", "", 28*4882a593Smuzhiyun "", 29*4882a593Smuzhiyun "FLASH_LED_EN (FLASH_CTRL_3)", 30*4882a593Smuzhiyun "", "", 31*4882a593Smuzhiyun "", "", "", "", "", 32*4882a593Smuzhiyun /* Used by UART2 (console) */ 33*4882a593Smuzhiyun "", "", 34*4882a593Smuzhiyun "MAGNETOMETER_INT"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun gpio@8012e080 { 38*4882a593Smuzhiyun /* GPIOs 32 - 63 */ 39*4882a593Smuzhiyun gpio-line-names = 40*4882a593Smuzhiyun "MAGNETOMETER_DRDY", 41*4882a593Smuzhiyun "", "", "", "", "", "", "", 42*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 43*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 44*4882a593Smuzhiyun "", "", "", "", "", "", "", ""; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun gpio@8000e000 { 48*4882a593Smuzhiyun /* GPIOs 64 - 95 */ 49*4882a593Smuzhiyun gpio-line-names = "XENON_EN2 (FLASH_CTRL_4)", 50*4882a593Smuzhiyun "DISP1_RST", 51*4882a593Smuzhiyun "DISP2_RST", 52*4882a593Smuzhiyun "TOUCH_INT2", 53*4882a593Smuzhiyun "LCD_VSI0_A", 54*4882a593Smuzhiyun "LCD_VSI1_A", 55*4882a593Smuzhiyun /* GPIO 70-77 used for ETM */ 56*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 57*4882a593Smuzhiyun /* GPIO 78-81 used for YCBCR */ 58*4882a593Smuzhiyun "", "", "", "", 59*4882a593Smuzhiyun "ACCELEROMETER_INT1_RDY", 60*4882a593Smuzhiyun "ACCELEROMETER_INT2", 61*4882a593Smuzhiyun "TOUCH_INT", 62*4882a593Smuzhiyun "WLAN_ENA", 63*4882a593Smuzhiyun "", "", "", "", "", 64*4882a593Smuzhiyun "FORCE_SENSING_INT", 65*4882a593Smuzhiyun "FORCE_SENSING_RESET", 66*4882a593Smuzhiyun "", "", 67*4882a593Smuzhiyun "SDMMC_CD"; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun gpio@8000e080 { 71*4882a593Smuzhiyun /* GPIOs 96 - 127 */ 72*4882a593Smuzhiyun gpio-line-names = "", 73*4882a593Smuzhiyun "FORCE_SENSING_WU", 74*4882a593Smuzhiyun "", "", "", "", "", "", 75*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 76*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 77*4882a593Smuzhiyun "", "", "", "", "", "", "", ""; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun gpio@8000e100 { 81*4882a593Smuzhiyun /* GPIOs 128 - 159 */ 82*4882a593Smuzhiyun gpio-line-names = "", "", "", "", "", "", "", "", 83*4882a593Smuzhiyun "", "", "", 84*4882a593Smuzhiyun "DIPRO_INT", /* GPIO139 */ 85*4882a593Smuzhiyun "XSHUTDOWN_SECONDARY_SENSOR", 86*4882a593Smuzhiyun "XSHUTDOWN_PRIMARY_SENSOR", 87*4882a593Smuzhiyun "NFC_RST (NFC_CTRL_", 88*4882a593Smuzhiyun "TOUCH_RST", 89*4882a593Smuzhiyun "NFC_IRQ (NFC_CTRL_1)", 90*4882a593Smuzhiyun "HAL_SW", 91*4882a593Smuzhiyun "TOUCH_RST2", 92*4882a593Smuzhiyun "", "", 93*4882a593Smuzhiyun "VAUDIO_HF_EN", /* GPIO149 */ 94*4882a593Smuzhiyun "", "", "", "", "", "", "", "", "", ""; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun gpio@8000e180 { 98*4882a593Smuzhiyun /* GPIOs 160 - 191 */ 99*4882a593Smuzhiyun gpio-line-names = "", "", "", "", "", "", "", "", 100*4882a593Smuzhiyun "", 101*4882a593Smuzhiyun "SDMMC_EN", 102*4882a593Smuzhiyun "XENON_CHARGE (FLASH_CONTROL_5)", 103*4882a593Smuzhiyun "GBF_ENA_RESET", 104*4882a593Smuzhiyun "", "", "", "", 105*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 106*4882a593Smuzhiyun "", "", "", "", "", "", "", ""; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun gpio@8011e000 { 110*4882a593Smuzhiyun /* GPIOs 192 - 223 */ 111*4882a593Smuzhiyun gpio-line-names = "HDTV_INTN", 112*4882a593Smuzhiyun "", "", "", 113*4882a593Smuzhiyun "HDTV_RSTN", 114*4882a593Smuzhiyun "", "", "", 115*4882a593Smuzhiyun "", /* GPIO200 */ 116*4882a593Smuzhiyun "", "", "", "", "", "", "", 117*4882a593Smuzhiyun /* GPIO208-216 used for WGBF_MC1 */ 118*4882a593Smuzhiyun "", "", "", "", "", "", "", "", "", 119*4882a593Smuzhiyun "SW_FRONT_PROXIMITY", /* GPIO217 */ 120*4882a593Smuzhiyun "KPD_CTRL_INT", /* Keypad controller */ 121*4882a593Smuzhiyun "", "", "", "", ""; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun gpio@8011e080 { 125*4882a593Smuzhiyun /* GPIOs 224 - 255 */ 126*4882a593Smuzhiyun gpio-line-names = "", "", 127*4882a593Smuzhiyun "HSIT_ACWAKE0", 128*4882a593Smuzhiyun "", "", "", "", "", 129*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 130*4882a593Smuzhiyun "", "", "", "", "", "", "", "", 131*4882a593Smuzhiyun "", "", "", "", "", "", "", ""; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun // External Micro SD slot 135*4882a593Smuzhiyun sdi0_per1@80126000 { 136*4882a593Smuzhiyun cd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; // 95 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun vmmci: regulator-gpio { 140*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; 141*4882a593Smuzhiyun enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; 142*4882a593Smuzhiyun enable-active-high; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun pinctrl { 146*4882a593Smuzhiyun /* 147*4882a593Smuzhiyun * Set this up using hogs, as time goes by and as seems fit, these 148*4882a593Smuzhiyun * can be moved over to being controlled by respective device. 149*4882a593Smuzhiyun */ 150*4882a593Smuzhiyun pinctrl-names = "default"; 151*4882a593Smuzhiyun pinctrl-0 = <&ipgpio_hrefv60_mode>, 152*4882a593Smuzhiyun <&etm_hrefv60_mode>, 153*4882a593Smuzhiyun <&nahj_hrefv60_mode>, 154*4882a593Smuzhiyun <&nfc_hrefv60_mode>, 155*4882a593Smuzhiyun <&force_hrefv60_mode>, 156*4882a593Smuzhiyun <&dipro_hrefv60_mode>, 157*4882a593Smuzhiyun <&vaudio_hf_hrefv60_mode>, 158*4882a593Smuzhiyun <&gbf_hrefv60_mode>, 159*4882a593Smuzhiyun <&hdtv_hrefv60_mode>, 160*4882a593Smuzhiyun <&gpios_hrefv60_mode>; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun sdi0 { 163*4882a593Smuzhiyun sdi0_default_mode: sdi0_default { 164*4882a593Smuzhiyun /* SD card detect GPIO pin, extend default state */ 165*4882a593Smuzhiyun default_hrefv60_cfg1 { 166*4882a593Smuzhiyun pins = "GPIO95_E8"; 167*4882a593Smuzhiyun ste,config = <&gpio_in_pu>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun /* VMMCI level-shifter enable */ 170*4882a593Smuzhiyun default_hrefv60_cfg2 { 171*4882a593Smuzhiyun pins = "GPIO169_D22"; 172*4882a593Smuzhiyun ste,config = <&gpio_out_hi>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun /* VMMCI level-shifter voltage select */ 175*4882a593Smuzhiyun default_hrefv60_cfg3 { 176*4882a593Smuzhiyun pins = "GPIO5_AG6"; 177*4882a593Smuzhiyun ste,config = <&gpio_out_hi>; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun ipgpio { 182*4882a593Smuzhiyun /* 183*4882a593Smuzhiyun * XENON Flashgun on image processor GPIO (controlled from image 184*4882a593Smuzhiyun * processor firmware), mux in these image processor GPIO lines 0 185*4882a593Smuzhiyun * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant 186*4882a593Smuzhiyun * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias 187*4882a593Smuzhiyun * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output. 188*4882a593Smuzhiyun */ 189*4882a593Smuzhiyun ipgpio_hrefv60_mode: ipgpio_hrefv60 { 190*4882a593Smuzhiyun hrefv60_mux { 191*4882a593Smuzhiyun function = "ipgpio"; 192*4882a593Smuzhiyun groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1"; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun hrefv60_cfg1 { 195*4882a593Smuzhiyun pins = "GPIO6_AF6", "GPIO7_AG5"; 196*4882a593Smuzhiyun ste,config = <&in_pu>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun hrefv60_cfg2 { 199*4882a593Smuzhiyun pins = "GPIO21_AB3"; 200*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun hrefv60_cfg3 { 203*4882a593Smuzhiyun pins = "GPIO64_F3"; 204*4882a593Smuzhiyun ste,config = <&out_lo>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun etm { 209*4882a593Smuzhiyun /* 210*4882a593Smuzhiyun * Drive D19-D23 for the ETM PTM trace interface low, 211*4882a593Smuzhiyun * (presumably pins are unconnected therefore grounded here, 212*4882a593Smuzhiyun * the "other alt C1" setting enables these pins) 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun etm_hrefv60_mode: etm_hrefv60 { 215*4882a593Smuzhiyun hrefv60_cfg1 { 216*4882a593Smuzhiyun pins = 217*4882a593Smuzhiyun "GPIO70_G5", 218*4882a593Smuzhiyun "GPIO71_G4", 219*4882a593Smuzhiyun "GPIO72_H4", 220*4882a593Smuzhiyun "GPIO73_H3", 221*4882a593Smuzhiyun "GPIO74_J3"; 222*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun nahj { 227*4882a593Smuzhiyun nahj_hrefv60_mode: nahj_hrefv60 { 228*4882a593Smuzhiyun /* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */ 229*4882a593Smuzhiyun hrefv60_cfg1 { 230*4882a593Smuzhiyun pins = "GPIO76_J2"; 231*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun hrefv60_cfg2 { 234*4882a593Smuzhiyun pins = "GPIO216_AG12"; 235*4882a593Smuzhiyun ste,config = <&gpio_out_hi>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun nfc { 240*4882a593Smuzhiyun nfc_hrefv60_mode: nfc_hrefv60 { 241*4882a593Smuzhiyun /* NFC ENA and RESET to low, pulldown IRQ line */ 242*4882a593Smuzhiyun hrefv60_cfg1 { 243*4882a593Smuzhiyun pins = 244*4882a593Smuzhiyun "GPIO77_H1", /* NFC_ENA */ 245*4882a593Smuzhiyun "GPIO142_C11"; /* NFC_RESET */ 246*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun hrefv60_cfg2 { 249*4882a593Smuzhiyun pins = "GPIO144_B13"; /* NFC_IRQ */ 250*4882a593Smuzhiyun ste,config = <&gpio_in_pd>; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun force { 255*4882a593Smuzhiyun force_hrefv60_mode: force_hrefv60 { 256*4882a593Smuzhiyun hrefv60_cfg1 { 257*4882a593Smuzhiyun pins = "GPIO91_B6"; /* FORCE_SENSING_INT */ 258*4882a593Smuzhiyun ste,config = <&gpio_in_pu>; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun hrefv60_cfg2 { 261*4882a593Smuzhiyun pins = 262*4882a593Smuzhiyun "GPIO92_D6", /* FORCE_SENSING_RST */ 263*4882a593Smuzhiyun "GPIO97_D9"; /* FORCE_SENSING_WU */ 264*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun dipro { 269*4882a593Smuzhiyun dipro_hrefv60_mode: dipro_hrefv60 { 270*4882a593Smuzhiyun hrefv60_cfg1 { 271*4882a593Smuzhiyun pins = "GPIO139_C9"; /* DIPRO_INT */ 272*4882a593Smuzhiyun ste,config = <&gpio_in_pu>; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun vaudio_hf { 277*4882a593Smuzhiyun vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 { 278*4882a593Smuzhiyun /* Audio Amplifier HF enable GPIO */ 279*4882a593Smuzhiyun hrefv60_cfg1 { 280*4882a593Smuzhiyun pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */ 281*4882a593Smuzhiyun ste,config = <&gpio_out_hi>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun gbf { 286*4882a593Smuzhiyun gbf_hrefv60_mode: gbf_hrefv60 { 287*4882a593Smuzhiyun /* 288*4882a593Smuzhiyun * GBF (GPS, Bluetooth, FM-radio) interface, 289*4882a593Smuzhiyun * pull low to reset state 290*4882a593Smuzhiyun */ 291*4882a593Smuzhiyun hrefv60_cfg1 { 292*4882a593Smuzhiyun pins = "GPIO171_D23"; /* GBF_ENA_RESET */ 293*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun hdtv { 298*4882a593Smuzhiyun hdtv_hrefv60_mode: hdtv_hrefv60 { 299*4882a593Smuzhiyun /* MSP : HDTV INTERFACE GPIO line */ 300*4882a593Smuzhiyun hrefv60_cfg1 { 301*4882a593Smuzhiyun pins = "GPIO192_AJ27"; 302*4882a593Smuzhiyun ste,config = <&gpio_in_pd>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun mcde { 307*4882a593Smuzhiyun lcd_hrefv60_mode: lcd_hrefv60 { 308*4882a593Smuzhiyun /* 309*4882a593Smuzhiyun * Display Interface 1 uses GPIO 65 for RST (reset). 310*4882a593Smuzhiyun * Display Interface 2 uses GPIO 66 for RST (reset). 311*4882a593Smuzhiyun * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset) 312*4882a593Smuzhiyun */ 313*4882a593Smuzhiyun hrefv60_cfg1 { 314*4882a593Smuzhiyun pins ="GPIO65_F1"; 315*4882a593Smuzhiyun ste,config = <&gpio_out_hi>; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun hrefv60_cfg2 { 318*4882a593Smuzhiyun pins ="GPIO66_G3"; 319*4882a593Smuzhiyun ste,config = <&gpio_out_lo>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun gpios { 324*4882a593Smuzhiyun /* Dangling GPIO pins */ 325*4882a593Smuzhiyun gpios_hrefv60_mode: gpios_hrefv60 { 326*4882a593Smuzhiyun default_cfg1 { 327*4882a593Smuzhiyun /* Normally UART1 RXD, now dangling */ 328*4882a593Smuzhiyun pins = "GPIO4_AH6"; 329*4882a593Smuzhiyun ste,config = <&in_pu>; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun}; 336