xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/spear600.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2012 Stefan Roese <sr@denx.de>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	#address-cells = <1>;
8*4882a593Smuzhiyun	#size-cells = <1>;
9*4882a593Smuzhiyun	compatible = "st,spear600";
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	cpus {
12*4882a593Smuzhiyun		#address-cells = <0>;
13*4882a593Smuzhiyun		#size-cells = <0>;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun		cpu {
16*4882a593Smuzhiyun			compatible = "arm,arm926ej-s";
17*4882a593Smuzhiyun			device_type = "cpu";
18*4882a593Smuzhiyun		};
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	memory {
22*4882a593Smuzhiyun		device_type = "memory";
23*4882a593Smuzhiyun		reg = <0 0x40000000>;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	ahb {
27*4882a593Smuzhiyun		#address-cells = <1>;
28*4882a593Smuzhiyun		#size-cells = <1>;
29*4882a593Smuzhiyun		compatible = "simple-bus";
30*4882a593Smuzhiyun		ranges = <0xd0000000 0xd0000000 0x30000000>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		vic0: interrupt-controller@f1100000 {
33*4882a593Smuzhiyun			compatible = "arm,pl190-vic";
34*4882a593Smuzhiyun			interrupt-controller;
35*4882a593Smuzhiyun			reg = <0xf1100000 0x1000>;
36*4882a593Smuzhiyun			#interrupt-cells = <1>;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		vic1: interrupt-controller@f1000000 {
40*4882a593Smuzhiyun			compatible = "arm,pl190-vic";
41*4882a593Smuzhiyun			interrupt-controller;
42*4882a593Smuzhiyun			reg = <0xf1000000 0x1000>;
43*4882a593Smuzhiyun			#interrupt-cells = <1>;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		clcd: clcd@fc200000 {
47*4882a593Smuzhiyun			compatible = "arm,pl110", "arm,primecell";
48*4882a593Smuzhiyun			reg = <0xfc200000 0x1000>;
49*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
50*4882a593Smuzhiyun			interrupts = <12>;
51*4882a593Smuzhiyun			status = "disabled";
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		dmac: dma@fc400000 {
55*4882a593Smuzhiyun			compatible = "arm,pl080", "arm,primecell";
56*4882a593Smuzhiyun			reg = <0xfc400000 0x1000>;
57*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
58*4882a593Smuzhiyun			interrupts = <10>;
59*4882a593Smuzhiyun			status = "disabled";
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		gmac: ethernet@e0800000 {
63*4882a593Smuzhiyun			compatible = "st,spear600-gmac";
64*4882a593Smuzhiyun			reg = <0xe0800000 0x8000>;
65*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
66*4882a593Smuzhiyun			interrupts = <24 23>;
67*4882a593Smuzhiyun			interrupt-names = "macirq", "eth_wake_irq";
68*4882a593Smuzhiyun			phy-mode = "gmii";
69*4882a593Smuzhiyun			status = "disabled";
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		fsmc: flash@d1800000 {
73*4882a593Smuzhiyun			compatible = "st,spear600-fsmc-nand";
74*4882a593Smuzhiyun			#address-cells = <1>;
75*4882a593Smuzhiyun			#size-cells = <1>;
76*4882a593Smuzhiyun			reg = <0xd1800000 0x1000	/* FSMC Register */
77*4882a593Smuzhiyun			       0xd2000000 0x0010	/* NAND Base DATA */
78*4882a593Smuzhiyun			       0xd2020000 0x0010	/* NAND Base ADDR */
79*4882a593Smuzhiyun			       0xd2010000 0x0010>;	/* NAND Base CMD */
80*4882a593Smuzhiyun			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
81*4882a593Smuzhiyun			status = "disabled";
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		smi: flash@fc000000 {
85*4882a593Smuzhiyun			compatible = "st,spear600-smi";
86*4882a593Smuzhiyun			#address-cells = <1>;
87*4882a593Smuzhiyun			#size-cells = <1>;
88*4882a593Smuzhiyun			reg = <0xfc000000 0x1000>;
89*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
90*4882a593Smuzhiyun			interrupts = <12>;
91*4882a593Smuzhiyun			status = "disabled";
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		ehci_usb0: ehci@e1800000 {
95*4882a593Smuzhiyun			compatible = "st,spear600-ehci", "usb-ehci";
96*4882a593Smuzhiyun			reg = <0xe1800000 0x1000>;
97*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
98*4882a593Smuzhiyun			interrupts = <27>;
99*4882a593Smuzhiyun			status = "disabled";
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		ehci_usb1: ehci@e2000000 {
103*4882a593Smuzhiyun			compatible = "st,spear600-ehci", "usb-ehci";
104*4882a593Smuzhiyun			reg = <0xe2000000 0x1000>;
105*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
106*4882a593Smuzhiyun			interrupts = <29>;
107*4882a593Smuzhiyun			status = "disabled";
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		ohci_usb0: ohci@e1900000 {
111*4882a593Smuzhiyun			compatible = "st,spear600-ohci", "usb-ohci";
112*4882a593Smuzhiyun			reg = <0xe1900000 0x1000>;
113*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
114*4882a593Smuzhiyun			interrupts = <26>;
115*4882a593Smuzhiyun			status = "disabled";
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		ohci_usb1: ohci@e2100000 {
119*4882a593Smuzhiyun			compatible = "st,spear600-ohci", "usb-ohci";
120*4882a593Smuzhiyun			reg = <0xe2100000 0x1000>;
121*4882a593Smuzhiyun			interrupt-parent = <&vic1>;
122*4882a593Smuzhiyun			interrupts = <28>;
123*4882a593Smuzhiyun			status = "disabled";
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		apb {
127*4882a593Smuzhiyun			#address-cells = <1>;
128*4882a593Smuzhiyun			#size-cells = <1>;
129*4882a593Smuzhiyun			compatible = "simple-bus";
130*4882a593Smuzhiyun			ranges = <0xd0000000 0xd0000000 0x30000000>;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun			uart0: serial@d0000000 {
133*4882a593Smuzhiyun				compatible = "arm,pl011", "arm,primecell";
134*4882a593Smuzhiyun				reg = <0xd0000000 0x1000>;
135*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
136*4882a593Smuzhiyun				interrupts = <24>;
137*4882a593Smuzhiyun				status = "disabled";
138*4882a593Smuzhiyun			};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun			uart1: serial@d0080000 {
141*4882a593Smuzhiyun				compatible = "arm,pl011", "arm,primecell";
142*4882a593Smuzhiyun				reg = <0xd0080000 0x1000>;
143*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
144*4882a593Smuzhiyun				interrupts = <25>;
145*4882a593Smuzhiyun				status = "disabled";
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun			/* local/cpu GPIO */
149*4882a593Smuzhiyun			gpio0: gpio@f0100000 {
150*4882a593Smuzhiyun				#gpio-cells = <2>;
151*4882a593Smuzhiyun				compatible = "arm,pl061", "arm,primecell";
152*4882a593Smuzhiyun				gpio-controller;
153*4882a593Smuzhiyun				reg = <0xf0100000 0x1000>;
154*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
155*4882a593Smuzhiyun				interrupts = <18>;
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun			/* basic GPIO */
159*4882a593Smuzhiyun			gpio1: gpio@fc980000 {
160*4882a593Smuzhiyun				#gpio-cells = <2>;
161*4882a593Smuzhiyun				compatible = "arm,pl061", "arm,primecell";
162*4882a593Smuzhiyun				gpio-controller;
163*4882a593Smuzhiyun				reg = <0xfc980000 0x1000>;
164*4882a593Smuzhiyun				interrupt-parent = <&vic1>;
165*4882a593Smuzhiyun				interrupts = <19>;
166*4882a593Smuzhiyun			};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			/* appl GPIO */
169*4882a593Smuzhiyun			gpio2: gpio@d8100000 {
170*4882a593Smuzhiyun				#gpio-cells = <2>;
171*4882a593Smuzhiyun				compatible = "arm,pl061", "arm,primecell";
172*4882a593Smuzhiyun				gpio-controller;
173*4882a593Smuzhiyun				reg = <0xd8100000 0x1000>;
174*4882a593Smuzhiyun				interrupt-parent = <&vic1>;
175*4882a593Smuzhiyun				interrupts = <4>;
176*4882a593Smuzhiyun			};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun			i2c: i2c@d0200000 {
179*4882a593Smuzhiyun				#address-cells = <1>;
180*4882a593Smuzhiyun				#size-cells = <0>;
181*4882a593Smuzhiyun				compatible = "snps,designware-i2c";
182*4882a593Smuzhiyun				reg = <0xd0200000 0x1000>;
183*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
184*4882a593Smuzhiyun				interrupts = <28>;
185*4882a593Smuzhiyun				status = "disabled";
186*4882a593Smuzhiyun			};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun			rtc: rtc@fc900000 {
189*4882a593Smuzhiyun				compatible = "st,spear600-rtc";
190*4882a593Smuzhiyun				reg = <0xfc900000 0x1000>;
191*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
192*4882a593Smuzhiyun				interrupts = <10>;
193*4882a593Smuzhiyun				status = "disabled";
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun			timer@f0000000 {
197*4882a593Smuzhiyun				compatible = "st,spear-timer";
198*4882a593Smuzhiyun				reg = <0xf0000000 0x400>;
199*4882a593Smuzhiyun				interrupt-parent = <&vic0>;
200*4882a593Smuzhiyun				interrupts = <16>;
201*4882a593Smuzhiyun			};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun			adc: adc@d820b000 {
204*4882a593Smuzhiyun				compatible = "st,spear600-adc";
205*4882a593Smuzhiyun				reg = <0xd820b000 0x1000>;
206*4882a593Smuzhiyun				interrupt-parent = <&vic1>;
207*4882a593Smuzhiyun				interrupts = <6>;
208*4882a593Smuzhiyun				status = "disabled";
209*4882a593Smuzhiyun			};
210*4882a593Smuzhiyun		};
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun};
213