1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * DTS file for all SPEAr3xx SoCs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2012 Viresh Kumar <vireshk@kernel.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun #address-cells = <1>; 10*4882a593Smuzhiyun #size-cells = <1>; 11*4882a593Smuzhiyun interrupt-parent = <&vic>; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun cpus { 14*4882a593Smuzhiyun #address-cells = <0>; 15*4882a593Smuzhiyun #size-cells = <0>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun cpu { 18*4882a593Smuzhiyun compatible = "arm,arm926ej-s"; 19*4882a593Smuzhiyun device_type = "cpu"; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun memory { 24*4882a593Smuzhiyun device_type = "memory"; 25*4882a593Smuzhiyun reg = <0 0x40000000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun ahb { 29*4882a593Smuzhiyun #address-cells = <1>; 30*4882a593Smuzhiyun #size-cells = <1>; 31*4882a593Smuzhiyun compatible = "simple-bus"; 32*4882a593Smuzhiyun ranges = <0xd0000000 0xd0000000 0x30000000>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vic: interrupt-controller@f1100000 { 35*4882a593Smuzhiyun compatible = "arm,pl190-vic"; 36*4882a593Smuzhiyun interrupt-controller; 37*4882a593Smuzhiyun reg = <0xf1100000 0x1000>; 38*4882a593Smuzhiyun #interrupt-cells = <1>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun dma@fc400000 { 42*4882a593Smuzhiyun compatible = "arm,pl080", "arm,primecell"; 43*4882a593Smuzhiyun reg = <0xfc400000 0x1000>; 44*4882a593Smuzhiyun interrupt-parent = <&vic>; 45*4882a593Smuzhiyun interrupts = <8>; 46*4882a593Smuzhiyun status = "disabled"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun gmac: eth@e0800000 { 50*4882a593Smuzhiyun compatible = "snps,dwmac-3.40a"; 51*4882a593Smuzhiyun reg = <0xe0800000 0x8000>; 52*4882a593Smuzhiyun interrupts = <23 22>; 53*4882a593Smuzhiyun interrupt-names = "macirq", "eth_wake_irq"; 54*4882a593Smuzhiyun phy-mode = "mii"; 55*4882a593Smuzhiyun status = "disabled"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun smi: flash@fc000000 { 59*4882a593Smuzhiyun compatible = "st,spear600-smi"; 60*4882a593Smuzhiyun #address-cells = <1>; 61*4882a593Smuzhiyun #size-cells = <1>; 62*4882a593Smuzhiyun reg = <0xfc000000 0x1000>; 63*4882a593Smuzhiyun interrupts = <9>; 64*4882a593Smuzhiyun status = "disabled"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun spi0: spi@d0100000 { 68*4882a593Smuzhiyun compatible = "arm,pl022", "arm,primecell"; 69*4882a593Smuzhiyun reg = <0xd0100000 0x1000>; 70*4882a593Smuzhiyun interrupts = <20>; 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <0>; 73*4882a593Smuzhiyun status = "disabled"; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun ehci@e1800000 { 77*4882a593Smuzhiyun compatible = "st,spear600-ehci", "usb-ehci"; 78*4882a593Smuzhiyun reg = <0xe1800000 0x1000>; 79*4882a593Smuzhiyun interrupts = <26>; 80*4882a593Smuzhiyun status = "disabled"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun ohci@e1900000 { 84*4882a593Smuzhiyun compatible = "st,spear600-ohci", "usb-ohci"; 85*4882a593Smuzhiyun reg = <0xe1900000 0x1000>; 86*4882a593Smuzhiyun interrupts = <25>; 87*4882a593Smuzhiyun status = "disabled"; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun ohci@e2100000 { 91*4882a593Smuzhiyun compatible = "st,spear600-ohci", "usb-ohci"; 92*4882a593Smuzhiyun reg = <0xe2100000 0x1000>; 93*4882a593Smuzhiyun interrupts = <27>; 94*4882a593Smuzhiyun status = "disabled"; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun apb { 98*4882a593Smuzhiyun #address-cells = <1>; 99*4882a593Smuzhiyun #size-cells = <1>; 100*4882a593Smuzhiyun compatible = "simple-bus"; 101*4882a593Smuzhiyun ranges = <0xd0000000 0xd0000000 0x30000000>; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun gpio0: gpio@fc980000 { 104*4882a593Smuzhiyun compatible = "arm,pl061", "arm,primecell"; 105*4882a593Smuzhiyun reg = <0xfc980000 0x1000>; 106*4882a593Smuzhiyun interrupts = <11>; 107*4882a593Smuzhiyun gpio-controller; 108*4882a593Smuzhiyun #gpio-cells = <2>; 109*4882a593Smuzhiyun interrupt-controller; 110*4882a593Smuzhiyun #interrupt-cells = <2>; 111*4882a593Smuzhiyun status = "disabled"; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun i2c0: i2c@d0180000 { 115*4882a593Smuzhiyun #address-cells = <1>; 116*4882a593Smuzhiyun #size-cells = <0>; 117*4882a593Smuzhiyun compatible = "snps,designware-i2c"; 118*4882a593Smuzhiyun reg = <0xd0180000 0x1000>; 119*4882a593Smuzhiyun interrupts = <21>; 120*4882a593Smuzhiyun status = "disabled"; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun rtc@fc900000 { 124*4882a593Smuzhiyun compatible = "st,spear600-rtc"; 125*4882a593Smuzhiyun reg = <0xfc900000 0x1000>; 126*4882a593Smuzhiyun interrupts = <10>; 127*4882a593Smuzhiyun status = "disabled"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun serial@d0000000 { 131*4882a593Smuzhiyun compatible = "arm,pl011", "arm,primecell"; 132*4882a593Smuzhiyun reg = <0xd0000000 0x1000>; 133*4882a593Smuzhiyun interrupts = <19>; 134*4882a593Smuzhiyun status = "disabled"; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun wdt@fc880000 { 138*4882a593Smuzhiyun compatible = "arm,sp805", "arm,primecell"; 139*4882a593Smuzhiyun reg = <0xfc880000 0x1000>; 140*4882a593Smuzhiyun interrupts = <12>; 141*4882a593Smuzhiyun status = "disabled"; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun timer@f0000000 { 145*4882a593Smuzhiyun compatible = "st,spear-timer"; 146*4882a593Smuzhiyun reg = <0xf0000000 0x400>; 147*4882a593Smuzhiyun interrupts = <2>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun}; 152