xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/spear320-hmi.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * DTS file for SPEAr320 Evaluation Baord
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Shiraz Hashim <shiraz.linux.kernel@gmail.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun/include/ "spear320.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "ST SPEAr320 HMI Board";
13*4882a593Smuzhiyun	compatible = "st,spear320-hmi", "st,spear320";
14*4882a593Smuzhiyun	#address-cells = <1>;
15*4882a593Smuzhiyun	#size-cells = <1>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	memory {
18*4882a593Smuzhiyun		reg = <0 0x40000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	ahb {
22*4882a593Smuzhiyun		pinmux@b3000000 {
23*4882a593Smuzhiyun			st,pinmux-mode = <4>;
24*4882a593Smuzhiyun			pinctrl-names = "default";
25*4882a593Smuzhiyun			pinctrl-0 = <&state_default>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun			state_default: pinmux {
28*4882a593Smuzhiyun				i2c0 {
29*4882a593Smuzhiyun					st,pins = "i2c0_grp";
30*4882a593Smuzhiyun					st,function = "i2c0";
31*4882a593Smuzhiyun				};
32*4882a593Smuzhiyun				ssp0 {
33*4882a593Smuzhiyun					st,pins = "ssp0_grp";
34*4882a593Smuzhiyun					st,function = "ssp0";
35*4882a593Smuzhiyun				};
36*4882a593Smuzhiyun				uart0 {
37*4882a593Smuzhiyun					st,pins = "uart0_grp";
38*4882a593Smuzhiyun					st,function = "uart0";
39*4882a593Smuzhiyun				};
40*4882a593Smuzhiyun				clcd {
41*4882a593Smuzhiyun					st,pins = "clcd_grp";
42*4882a593Smuzhiyun					st,function = "clcd";
43*4882a593Smuzhiyun				};
44*4882a593Smuzhiyun				fsmc {
45*4882a593Smuzhiyun					st,pins = "fsmc_8bit_grp";
46*4882a593Smuzhiyun					st,function = "fsmc";
47*4882a593Smuzhiyun				};
48*4882a593Smuzhiyun				sdhci {
49*4882a593Smuzhiyun					st,pins = "sdhci_cd_12_grp";
50*4882a593Smuzhiyun					st,function = "sdhci";
51*4882a593Smuzhiyun				};
52*4882a593Smuzhiyun				i2s {
53*4882a593Smuzhiyun					st,pins = "i2s_grp";
54*4882a593Smuzhiyun					st,function = "i2s";
55*4882a593Smuzhiyun				};
56*4882a593Smuzhiyun				uart1 {
57*4882a593Smuzhiyun					st,pins = "uart1_grp";
58*4882a593Smuzhiyun					st,function = "uart1";
59*4882a593Smuzhiyun				};
60*4882a593Smuzhiyun				uart2 {
61*4882a593Smuzhiyun					st,pins = "uart2_grp";
62*4882a593Smuzhiyun					st,function = "uart2";
63*4882a593Smuzhiyun				};
64*4882a593Smuzhiyun				can0 {
65*4882a593Smuzhiyun					st,pins = "can0_grp";
66*4882a593Smuzhiyun					st,function = "can0";
67*4882a593Smuzhiyun				};
68*4882a593Smuzhiyun				can1 {
69*4882a593Smuzhiyun					st,pins = "can1_grp";
70*4882a593Smuzhiyun					st,function = "can1";
71*4882a593Smuzhiyun				};
72*4882a593Smuzhiyun				mii0_1 {
73*4882a593Smuzhiyun					st,pins = "rmii0_1_grp";
74*4882a593Smuzhiyun					st,function = "mii0_1";
75*4882a593Smuzhiyun				};
76*4882a593Smuzhiyun				pwm0_1 {
77*4882a593Smuzhiyun					st,pins = "pwm0_1_pin_37_38_grp";
78*4882a593Smuzhiyun					st,function = "pwm0_1";
79*4882a593Smuzhiyun				};
80*4882a593Smuzhiyun				pwm2 {
81*4882a593Smuzhiyun					st,pins = "pwm2_pin_34_grp";
82*4882a593Smuzhiyun					st,function = "pwm2";
83*4882a593Smuzhiyun				};
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		clcd@90000000 {
88*4882a593Smuzhiyun			status = "okay";
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		dma@fc400000 {
92*4882a593Smuzhiyun			status = "okay";
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		ehci@e1800000 {
96*4882a593Smuzhiyun			status = "okay";
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		fsmc: flash@4c000000 {
100*4882a593Smuzhiyun			status = "okay";
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun			partition@0 {
103*4882a593Smuzhiyun				label = "xloader";
104*4882a593Smuzhiyun				reg = <0x0 0x80000>;
105*4882a593Smuzhiyun			};
106*4882a593Smuzhiyun			partition@80000 {
107*4882a593Smuzhiyun				label = "u-boot";
108*4882a593Smuzhiyun				reg = <0x80000 0x140000>;
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun			partition@1C0000 {
111*4882a593Smuzhiyun				label = "environment";
112*4882a593Smuzhiyun				reg = <0x1C0000 0x40000>;
113*4882a593Smuzhiyun			};
114*4882a593Smuzhiyun			partition@200000 {
115*4882a593Smuzhiyun				label = "dtb";
116*4882a593Smuzhiyun				reg = <0x200000 0x40000>;
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun			partition@240000 {
119*4882a593Smuzhiyun				label = "linux";
120*4882a593Smuzhiyun				reg = <0x240000 0xC00000>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun			partition@E40000 {
123*4882a593Smuzhiyun				label = "rootfs";
124*4882a593Smuzhiyun				reg = <0xE40000 0x0>;
125*4882a593Smuzhiyun			};
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		gpio_keys {
129*4882a593Smuzhiyun			compatible = "gpio-keys";
130*4882a593Smuzhiyun			#address-cells = <1>;
131*4882a593Smuzhiyun			#size-cells = <0>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun			button@1 {
134*4882a593Smuzhiyun				label = "user button 1";
135*4882a593Smuzhiyun				linux,code = <0x100>;
136*4882a593Smuzhiyun				gpios = <&stmpegpio 3 0x4>;
137*4882a593Smuzhiyun				debounce-interval = <20>;
138*4882a593Smuzhiyun				wakeup-source;
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun			button@2 {
142*4882a593Smuzhiyun				label = "user button 2";
143*4882a593Smuzhiyun				linux,code = <0x200>;
144*4882a593Smuzhiyun				gpios = <&stmpegpio 2 0x4>;
145*4882a593Smuzhiyun				debounce-interval = <20>;
146*4882a593Smuzhiyun				wakeup-source;
147*4882a593Smuzhiyun			};
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun		ohci@e1900000 {
151*4882a593Smuzhiyun			status = "okay";
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun		ohci@e2100000 {
155*4882a593Smuzhiyun			status = "okay";
156*4882a593Smuzhiyun		};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun		pwm: pwm@a8000000 {
159*4882a593Smuzhiyun			status = "okay";
160*4882a593Smuzhiyun		};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun		sdhci@70000000 {
163*4882a593Smuzhiyun			power-gpio = <&gpiopinctrl 50 1>;
164*4882a593Smuzhiyun			power_always_enb;
165*4882a593Smuzhiyun			status = "okay";
166*4882a593Smuzhiyun		};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun		smi: flash@fc000000 {
169*4882a593Smuzhiyun			status = "okay";
170*4882a593Smuzhiyun			clock-rate=<50000000>;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun			flash@f8000000 {
173*4882a593Smuzhiyun				#address-cells = <1>;
174*4882a593Smuzhiyun				#size-cells = <1>;
175*4882a593Smuzhiyun				reg = <0xf8000000 0x800000>;
176*4882a593Smuzhiyun				st,smi-fast-mode;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun				partition@0 {
179*4882a593Smuzhiyun					label = "xloader";
180*4882a593Smuzhiyun					reg = <0x0 0x10000>;
181*4882a593Smuzhiyun				};
182*4882a593Smuzhiyun				partition@10000 {
183*4882a593Smuzhiyun					label = "u-boot";
184*4882a593Smuzhiyun					reg = <0x10000 0x50000>;
185*4882a593Smuzhiyun				};
186*4882a593Smuzhiyun				partition@60000 {
187*4882a593Smuzhiyun					label = "environment";
188*4882a593Smuzhiyun					reg = <0x60000 0x10000>;
189*4882a593Smuzhiyun				};
190*4882a593Smuzhiyun				partition@70000 {
191*4882a593Smuzhiyun					label = "dtb";
192*4882a593Smuzhiyun					reg = <0x70000 0x10000>;
193*4882a593Smuzhiyun				};
194*4882a593Smuzhiyun				partition@80000 {
195*4882a593Smuzhiyun					label = "linux";
196*4882a593Smuzhiyun					reg = <0x80000 0x310000>;
197*4882a593Smuzhiyun				};
198*4882a593Smuzhiyun				partition@390000 {
199*4882a593Smuzhiyun					label = "rootfs";
200*4882a593Smuzhiyun					reg = <0x390000 0x0>;
201*4882a593Smuzhiyun				};
202*4882a593Smuzhiyun			};
203*4882a593Smuzhiyun		};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun		spi0: spi@d0100000 {
206*4882a593Smuzhiyun			status = "okay";
207*4882a593Smuzhiyun		};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun		spi1: spi@a5000000 {
210*4882a593Smuzhiyun			status = "okay";
211*4882a593Smuzhiyun		};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun		spi2: spi@a6000000 {
214*4882a593Smuzhiyun			status = "okay";
215*4882a593Smuzhiyun		};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun		usbd@e1100000 {
218*4882a593Smuzhiyun			status = "okay";
219*4882a593Smuzhiyun		};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		apb {
222*4882a593Smuzhiyun			gpio0: gpio@fc980000 {
223*4882a593Smuzhiyun			       status = "okay";
224*4882a593Smuzhiyun			};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			gpio@b3000000 {
227*4882a593Smuzhiyun				status = "okay";
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			i2c0: i2c@d0180000 {
231*4882a593Smuzhiyun				status = "okay";
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun				stmpe811@41 {
234*4882a593Smuzhiyun					compatible = "st,stmpe811";
235*4882a593Smuzhiyun					#address-cells = <1>;
236*4882a593Smuzhiyun					#size-cells = <0>;
237*4882a593Smuzhiyun					reg = <0x41>;
238*4882a593Smuzhiyun					irq-over-gpio;
239*4882a593Smuzhiyun					irq-gpios = <&gpiopinctrl 29 0x4>;
240*4882a593Smuzhiyun					id = <0>;
241*4882a593Smuzhiyun					blocks = <0x5>;
242*4882a593Smuzhiyun					irq-trigger = <0x1>;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun					stmpegpio: stmpe-gpio {
245*4882a593Smuzhiyun						compatible = "stmpe,gpio";
246*4882a593Smuzhiyun						reg = <0>;
247*4882a593Smuzhiyun						gpio-controller;
248*4882a593Smuzhiyun						#gpio-cells = <2>;
249*4882a593Smuzhiyun						gpio,norequest-mask = <0xF3>;
250*4882a593Smuzhiyun					};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun					stmpe610-ts {
253*4882a593Smuzhiyun						compatible = "stmpe,ts";
254*4882a593Smuzhiyun						reg = <0>;
255*4882a593Smuzhiyun						ts,sample-time = <4>;
256*4882a593Smuzhiyun						ts,mod-12b = <1>;
257*4882a593Smuzhiyun						ts,ref-sel = <0>;
258*4882a593Smuzhiyun						ts,adc-freq = <1>;
259*4882a593Smuzhiyun						ts,ave-ctrl = <1>;
260*4882a593Smuzhiyun						ts,touch-det-delay = <3>;
261*4882a593Smuzhiyun						ts,settling = <4>;
262*4882a593Smuzhiyun						ts,fraction-z = <7>;
263*4882a593Smuzhiyun						ts,i-drive = <1>;
264*4882a593Smuzhiyun					};
265*4882a593Smuzhiyun				};
266*4882a593Smuzhiyun			};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun			i2c1: i2c@a7000000 {
269*4882a593Smuzhiyun			       status = "okay";
270*4882a593Smuzhiyun			};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun			rtc@fc900000 {
273*4882a593Smuzhiyun			       status = "okay";
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun			serial@d0000000 {
277*4882a593Smuzhiyun			       status = "okay";
278*4882a593Smuzhiyun				pinctrl-names = "default";
279*4882a593Smuzhiyun				pinctrl-0 = <>;
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun			serial@a3000000 {
283*4882a593Smuzhiyun			       status = "okay";
284*4882a593Smuzhiyun				pinctrl-names = "default";
285*4882a593Smuzhiyun				pinctrl-0 = <>;
286*4882a593Smuzhiyun			};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun			serial@a4000000 {
289*4882a593Smuzhiyun			       status = "okay";
290*4882a593Smuzhiyun				pinctrl-names = "default";
291*4882a593Smuzhiyun				pinctrl-0 = <>;
292*4882a593Smuzhiyun			};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun			wdt@fc880000 {
295*4882a593Smuzhiyun			       status = "okay";
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun		};
298*4882a593Smuzhiyun	};
299*4882a593Smuzhiyun};
300