1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * DTS file for SPEAr320 Evaluation Baord 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2012 Viresh Kumar <vireshk@kernel.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun/include/ "spear320.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "ST SPEAr320 Evaluation Board"; 13*4882a593Smuzhiyun compatible = "st,spear320-evb", "st,spear320"; 14*4882a593Smuzhiyun #address-cells = <1>; 15*4882a593Smuzhiyun #size-cells = <1>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun memory { 18*4882a593Smuzhiyun reg = <0 0x40000000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun ahb { 22*4882a593Smuzhiyun pinmux@b3000000 { 23*4882a593Smuzhiyun st,pinmux-mode = <4>; 24*4882a593Smuzhiyun pinctrl-names = "default"; 25*4882a593Smuzhiyun pinctrl-0 = <&state_default>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun state_default: pinmux { 28*4882a593Smuzhiyun i2c0 { 29*4882a593Smuzhiyun st,pins = "i2c0_grp"; 30*4882a593Smuzhiyun st,function = "i2c0"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun mii0 { 33*4882a593Smuzhiyun st,pins = "mii0_grp"; 34*4882a593Smuzhiyun st,function = "mii0"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun ssp0 { 37*4882a593Smuzhiyun st,pins = "ssp0_grp"; 38*4882a593Smuzhiyun st,function = "ssp0"; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun uart0 { 41*4882a593Smuzhiyun st,pins = "uart0_grp"; 42*4882a593Smuzhiyun st,function = "uart0"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun sdhci { 45*4882a593Smuzhiyun st,pins = "sdhci_cd_51_grp"; 46*4882a593Smuzhiyun st,function = "sdhci"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun i2s { 49*4882a593Smuzhiyun st,pins = "i2s_grp"; 50*4882a593Smuzhiyun st,function = "i2s"; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun uart1 { 53*4882a593Smuzhiyun st,pins = "uart1_grp"; 54*4882a593Smuzhiyun st,function = "uart1"; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun uart2 { 57*4882a593Smuzhiyun st,pins = "uart2_grp"; 58*4882a593Smuzhiyun st,function = "uart2"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun can0 { 61*4882a593Smuzhiyun st,pins = "can0_grp"; 62*4882a593Smuzhiyun st,function = "can0"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun can1 { 65*4882a593Smuzhiyun st,pins = "can1_grp"; 66*4882a593Smuzhiyun st,function = "can1"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun mii2 { 69*4882a593Smuzhiyun st,pins = "mii2_grp"; 70*4882a593Smuzhiyun st,function = "mii2"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun pwm0_1 { 73*4882a593Smuzhiyun st,pins = "pwm0_1_pin_37_38_grp"; 74*4882a593Smuzhiyun st,function = "pwm0_1"; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun dma@fc400000 { 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun fsmc: flash@4c000000 { 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun gmac: eth@e0800000 { 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun sdhci@70000000 { 92*4882a593Smuzhiyun power-gpio = <&gpiopinctrl 61 1>; 93*4882a593Smuzhiyun status = "okay"; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun smi: flash@fc000000 { 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun clock-rate=<50000000>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun flash@f8000000 { 101*4882a593Smuzhiyun #address-cells = <1>; 102*4882a593Smuzhiyun #size-cells = <1>; 103*4882a593Smuzhiyun reg = <0xf8000000 0x800000>; 104*4882a593Smuzhiyun st,smi-fast-mode; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun partition@0 { 107*4882a593Smuzhiyun label = "xloader"; 108*4882a593Smuzhiyun reg = <0x0 0x10000>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun partition@10000 { 111*4882a593Smuzhiyun label = "u-boot"; 112*4882a593Smuzhiyun reg = <0x10000 0x50000>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun partition@60000 { 115*4882a593Smuzhiyun label = "environment"; 116*4882a593Smuzhiyun reg = <0x60000 0x10000>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun partition@70000 { 119*4882a593Smuzhiyun label = "dtb"; 120*4882a593Smuzhiyun reg = <0x70000 0x10000>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun partition@80000 { 123*4882a593Smuzhiyun label = "linux"; 124*4882a593Smuzhiyun reg = <0x80000 0x310000>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun partition@390000 { 127*4882a593Smuzhiyun label = "rootfs"; 128*4882a593Smuzhiyun reg = <0x390000 0x0>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun spi0: spi@d0100000 { 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun spi1: spi@a5000000 { 138*4882a593Smuzhiyun status = "okay"; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun spi2: spi@a6000000 { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun ehci@e1800000 { 146*4882a593Smuzhiyun status = "okay"; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun ohci@e1900000 { 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun ohci@e2100000 { 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun apb { 158*4882a593Smuzhiyun gpio0: gpio@fc980000 { 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun gpio@b3000000 { 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun i2c0: i2c@d0180000 { 167*4882a593Smuzhiyun status = "okay"; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun i2c1: i2c@a7000000 { 171*4882a593Smuzhiyun status = "okay"; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun rtc@fc900000 { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun serial@d0000000 { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun pinctrl-names = "default"; 181*4882a593Smuzhiyun pinctrl-0 = <>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun serial@a3000000 { 185*4882a593Smuzhiyun status = "okay"; 186*4882a593Smuzhiyun pinctrl-names = "default"; 187*4882a593Smuzhiyun pinctrl-0 = <>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun serial@a4000000 { 191*4882a593Smuzhiyun status = "okay"; 192*4882a593Smuzhiyun pinctrl-names = "default"; 193*4882a593Smuzhiyun pinctrl-0 = <>; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun wdt@fc880000 { 197*4882a593Smuzhiyun status = "okay"; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun}; 202