xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/spear13xx.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * DTS file for all SPEAr13xx SoCs
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	#address-cells = <1>;
10*4882a593Smuzhiyun	#size-cells = <1>;
11*4882a593Smuzhiyun	interrupt-parent = <&gic>;
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	cpus {
14*4882a593Smuzhiyun		#address-cells = <1>;
15*4882a593Smuzhiyun		#size-cells = <0>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun		cpu@0 {
18*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
19*4882a593Smuzhiyun			device_type = "cpu";
20*4882a593Smuzhiyun			reg = <0>;
21*4882a593Smuzhiyun			next-level-cache = <&L2>;
22*4882a593Smuzhiyun		};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		cpu@1 {
25*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
26*4882a593Smuzhiyun			device_type = "cpu";
27*4882a593Smuzhiyun			reg = <1>;
28*4882a593Smuzhiyun			next-level-cache = <&L2>;
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	gic: interrupt-controller@ec801000 {
33*4882a593Smuzhiyun		compatible = "arm,cortex-a9-gic";
34*4882a593Smuzhiyun		interrupt-controller;
35*4882a593Smuzhiyun		#interrupt-cells = <3>;
36*4882a593Smuzhiyun		reg = < 0xec801000 0x1000 >,
37*4882a593Smuzhiyun		      < 0xec800100 0x0100 >;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	pmu {
41*4882a593Smuzhiyun		compatible = "arm,cortex-a9-pmu";
42*4882a593Smuzhiyun		interrupts = <0 6 0x04
43*4882a593Smuzhiyun			      0 7 0x04>;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	L2: cache-controller {
47*4882a593Smuzhiyun		    compatible = "arm,pl310-cache";
48*4882a593Smuzhiyun		    reg = <0xed000000 0x1000>;
49*4882a593Smuzhiyun		    cache-unified;
50*4882a593Smuzhiyun		    cache-level = <2>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	memory {
54*4882a593Smuzhiyun		name = "memory";
55*4882a593Smuzhiyun		device_type = "memory";
56*4882a593Smuzhiyun		reg = <0 0x40000000>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	chosen {
60*4882a593Smuzhiyun		bootargs = "console=ttyAMA0,115200";
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	cpufreq {
64*4882a593Smuzhiyun		compatible = "st,cpufreq-spear";
65*4882a593Smuzhiyun		cpufreq_tbl = < 166000
66*4882a593Smuzhiyun				200000
67*4882a593Smuzhiyun				250000
68*4882a593Smuzhiyun				300000
69*4882a593Smuzhiyun				400000
70*4882a593Smuzhiyun				500000
71*4882a593Smuzhiyun				600000 >;
72*4882a593Smuzhiyun		status = "disabled";
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	ahb {
76*4882a593Smuzhiyun		#address-cells = <1>;
77*4882a593Smuzhiyun		#size-cells = <1>;
78*4882a593Smuzhiyun		compatible = "simple-bus";
79*4882a593Smuzhiyun		ranges = <0x50000000 0x50000000 0x10000000
80*4882a593Smuzhiyun			  0x80000000 0x80000000 0x20000000
81*4882a593Smuzhiyun			  0xb0000000 0xb0000000 0x22000000
82*4882a593Smuzhiyun			  0xd8000000 0xd8000000 0x01000000
83*4882a593Smuzhiyun			  0xe0000000 0xe0000000 0x10000000>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		sdhci@b3000000 {
86*4882a593Smuzhiyun			compatible = "st,sdhci-spear";
87*4882a593Smuzhiyun			reg = <0xb3000000 0x100>;
88*4882a593Smuzhiyun			interrupts = <0 28 0x4>;
89*4882a593Smuzhiyun			status = "disabled";
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		cf@b2800000 {
93*4882a593Smuzhiyun			compatible = "arasan,cf-spear1340";
94*4882a593Smuzhiyun			reg = <0xb2800000 0x1000>;
95*4882a593Smuzhiyun			interrupts = <0 29 0x4>;
96*4882a593Smuzhiyun			status = "disabled";
97*4882a593Smuzhiyun			dmas = <&dwdma0 0 0 0>;
98*4882a593Smuzhiyun			dma-names = "data";
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		dwdma0: dma@ea800000 {
102*4882a593Smuzhiyun			compatible = "snps,dma-spear1340";
103*4882a593Smuzhiyun			reg = <0xea800000 0x1000>;
104*4882a593Smuzhiyun			interrupts = <0 19 0x4>;
105*4882a593Smuzhiyun			status = "disabled";
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun			dma-channels = <8>;
108*4882a593Smuzhiyun			#dma-cells = <3>;
109*4882a593Smuzhiyun			dma-requests = <32>;
110*4882a593Smuzhiyun			chan_allocation_order = <1>;
111*4882a593Smuzhiyun			chan_priority = <1>;
112*4882a593Smuzhiyun			block_size = <0xfff>;
113*4882a593Smuzhiyun			dma-masters = <2>;
114*4882a593Smuzhiyun			data-width = <8 8>;
115*4882a593Smuzhiyun			multi-block = <1 1 1 1 1 1 1 1>;
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		dma@eb000000 {
119*4882a593Smuzhiyun			compatible = "snps,dma-spear1340";
120*4882a593Smuzhiyun			reg = <0xeb000000 0x1000>;
121*4882a593Smuzhiyun			interrupts = <0 59 0x4>;
122*4882a593Smuzhiyun			status = "disabled";
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun			dma-requests = <32>;
125*4882a593Smuzhiyun			dma-channels = <8>;
126*4882a593Smuzhiyun			dma-masters = <2>;
127*4882a593Smuzhiyun			#dma-cells = <3>;
128*4882a593Smuzhiyun			chan_allocation_order = <1>;
129*4882a593Smuzhiyun			chan_priority = <1>;
130*4882a593Smuzhiyun			block_size = <0xfff>;
131*4882a593Smuzhiyun			data-width = <8 8>;
132*4882a593Smuzhiyun			multi-block = <1 1 1 1 1 1 1 1>;
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		fsmc: flash@b0000000 {
136*4882a593Smuzhiyun			compatible = "st,spear600-fsmc-nand";
137*4882a593Smuzhiyun			#address-cells = <1>;
138*4882a593Smuzhiyun			#size-cells = <1>;
139*4882a593Smuzhiyun			reg = <0xb0000000 0x1000	/* FSMC Register*/
140*4882a593Smuzhiyun			       0xb0800000 0x0010	/* NAND Base DATA */
141*4882a593Smuzhiyun			       0xb0820000 0x0010	/* NAND Base ADDR */
142*4882a593Smuzhiyun			       0xb0810000 0x0010>;	/* NAND Base CMD */
143*4882a593Smuzhiyun			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
144*4882a593Smuzhiyun			interrupts = <0 20 0x4
145*4882a593Smuzhiyun				      0 21 0x4
146*4882a593Smuzhiyun				      0 22 0x4
147*4882a593Smuzhiyun				      0 23 0x4>;
148*4882a593Smuzhiyun			st,mode = <2>;
149*4882a593Smuzhiyun			status = "disabled";
150*4882a593Smuzhiyun		};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun		gmac0: eth@e2000000 {
153*4882a593Smuzhiyun			compatible = "st,spear600-gmac";
154*4882a593Smuzhiyun			reg = <0xe2000000 0x8000>;
155*4882a593Smuzhiyun			interrupts = <0 33 0x4
156*4882a593Smuzhiyun				      0 34 0x4>;
157*4882a593Smuzhiyun			interrupt-names = "macirq", "eth_wake_irq";
158*4882a593Smuzhiyun			status = "disabled";
159*4882a593Smuzhiyun		};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		pcm {
162*4882a593Smuzhiyun			compatible = "st,pcm-audio";
163*4882a593Smuzhiyun			#address-cells = <0>;
164*4882a593Smuzhiyun			#size-cells = <0>;
165*4882a593Smuzhiyun			status = "disabled";
166*4882a593Smuzhiyun		};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun		smi: flash@ea000000 {
169*4882a593Smuzhiyun			compatible = "st,spear600-smi";
170*4882a593Smuzhiyun			#address-cells = <1>;
171*4882a593Smuzhiyun			#size-cells = <1>;
172*4882a593Smuzhiyun			reg = <0xea000000 0x1000>;
173*4882a593Smuzhiyun			interrupts = <0 30 0x4>;
174*4882a593Smuzhiyun			status = "disabled";
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		ehci@e4800000 {
178*4882a593Smuzhiyun			compatible = "st,spear600-ehci", "usb-ehci";
179*4882a593Smuzhiyun			reg = <0xe4800000 0x1000>;
180*4882a593Smuzhiyun			interrupts = <0 64 0x4>;
181*4882a593Smuzhiyun			usbh0_id = <0>;
182*4882a593Smuzhiyun			status = "disabled";
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun		ehci@e5800000 {
186*4882a593Smuzhiyun			compatible = "st,spear600-ehci", "usb-ehci";
187*4882a593Smuzhiyun			reg = <0xe5800000 0x1000>;
188*4882a593Smuzhiyun			interrupts = <0 66 0x4>;
189*4882a593Smuzhiyun			usbh1_id = <1>;
190*4882a593Smuzhiyun			status = "disabled";
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun		ohci@e4000000 {
194*4882a593Smuzhiyun			compatible = "st,spear600-ohci", "usb-ohci";
195*4882a593Smuzhiyun			reg = <0xe4000000 0x1000>;
196*4882a593Smuzhiyun			interrupts = <0 65 0x4>;
197*4882a593Smuzhiyun			usbh0_id = <0>;
198*4882a593Smuzhiyun			status = "disabled";
199*4882a593Smuzhiyun		};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun		ohci@e5000000 {
202*4882a593Smuzhiyun			compatible = "st,spear600-ohci", "usb-ohci";
203*4882a593Smuzhiyun			reg = <0xe5000000 0x1000>;
204*4882a593Smuzhiyun			interrupts = <0 67 0x4>;
205*4882a593Smuzhiyun			usbh1_id = <1>;
206*4882a593Smuzhiyun			status = "disabled";
207*4882a593Smuzhiyun		};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun		apb {
210*4882a593Smuzhiyun			#address-cells = <1>;
211*4882a593Smuzhiyun			#size-cells = <1>;
212*4882a593Smuzhiyun			compatible = "simple-bus";
213*4882a593Smuzhiyun			ranges = <0x50000000 0x50000000 0x10000000
214*4882a593Smuzhiyun				  0xb0000000 0xb0000000 0x10000000
215*4882a593Smuzhiyun				  0xd0000000 0xd0000000 0x02000000
216*4882a593Smuzhiyun				  0xd8000000 0xd8000000 0x01000000
217*4882a593Smuzhiyun				  0xe0000000 0xe0000000 0x10000000>;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun			misc: syscon@e0700000 {
220*4882a593Smuzhiyun				compatible = "st,spear1340-misc", "syscon";
221*4882a593Smuzhiyun				reg = <0xe0700000 0x1000>;
222*4882a593Smuzhiyun			};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun			gpio0: gpio@e0600000 {
225*4882a593Smuzhiyun				compatible = "arm,pl061", "arm,primecell";
226*4882a593Smuzhiyun				reg = <0xe0600000 0x1000>;
227*4882a593Smuzhiyun				interrupts = <0 24 0x4>;
228*4882a593Smuzhiyun				gpio-controller;
229*4882a593Smuzhiyun				#gpio-cells = <2>;
230*4882a593Smuzhiyun				interrupt-controller;
231*4882a593Smuzhiyun				#interrupt-cells = <2>;
232*4882a593Smuzhiyun				status = "disabled";
233*4882a593Smuzhiyun			};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun			gpio1: gpio@e0680000 {
236*4882a593Smuzhiyun				compatible = "arm,pl061", "arm,primecell";
237*4882a593Smuzhiyun				reg = <0xe0680000 0x1000>;
238*4882a593Smuzhiyun				interrupts = <0 25 0x4>;
239*4882a593Smuzhiyun				gpio-controller;
240*4882a593Smuzhiyun				#gpio-cells = <2>;
241*4882a593Smuzhiyun				interrupt-controller;
242*4882a593Smuzhiyun				#interrupt-cells = <2>;
243*4882a593Smuzhiyun				status = "disabled";
244*4882a593Smuzhiyun			};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun			kbd@e0300000 {
247*4882a593Smuzhiyun				compatible = "st,spear300-kbd";
248*4882a593Smuzhiyun				reg = <0xe0300000 0x1000>;
249*4882a593Smuzhiyun				interrupts = <0 52 0x4>;
250*4882a593Smuzhiyun				status = "disabled";
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun			i2c0: i2c@e0280000 {
254*4882a593Smuzhiyun				#address-cells = <1>;
255*4882a593Smuzhiyun				#size-cells = <0>;
256*4882a593Smuzhiyun				compatible = "snps,designware-i2c";
257*4882a593Smuzhiyun				reg = <0xe0280000 0x1000>;
258*4882a593Smuzhiyun				interrupts = <0 41 0x4>;
259*4882a593Smuzhiyun				status = "disabled";
260*4882a593Smuzhiyun			};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun			i2s@e0180000 {
263*4882a593Smuzhiyun				compatible = "st,designware-i2s";
264*4882a593Smuzhiyun				reg = <0xe0180000 0x1000>;
265*4882a593Smuzhiyun				interrupt-names = "play_irq", "record_irq";
266*4882a593Smuzhiyun				interrupts = <0 10 0x4
267*4882a593Smuzhiyun					      0 11 0x4 >;
268*4882a593Smuzhiyun				status = "disabled";
269*4882a593Smuzhiyun			};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun			i2s@e0200000 {
272*4882a593Smuzhiyun				compatible = "st,designware-i2s";
273*4882a593Smuzhiyun				reg = <0xe0200000 0x1000>;
274*4882a593Smuzhiyun				interrupt-names = "play_irq", "record_irq";
275*4882a593Smuzhiyun				interrupts = <0 26 0x4
276*4882a593Smuzhiyun					      0 53 0x4>;
277*4882a593Smuzhiyun				status = "disabled";
278*4882a593Smuzhiyun			};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun			spi0: spi@e0100000 {
281*4882a593Smuzhiyun				compatible = "arm,pl022", "arm,primecell";
282*4882a593Smuzhiyun				reg = <0xe0100000 0x1000>;
283*4882a593Smuzhiyun				#address-cells = <1>;
284*4882a593Smuzhiyun				#size-cells = <0>;
285*4882a593Smuzhiyun				interrupts = <0 31 0x4>;
286*4882a593Smuzhiyun				status = "disabled";
287*4882a593Smuzhiyun				dmas = <&dwdma0 5 0 0>,
288*4882a593Smuzhiyun					<&dwdma0 4 0 0>;
289*4882a593Smuzhiyun				dma-names = "rx", "tx";
290*4882a593Smuzhiyun			};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun			rtc@e0580000 {
293*4882a593Smuzhiyun				compatible = "st,spear600-rtc";
294*4882a593Smuzhiyun				reg = <0xe0580000 0x1000>;
295*4882a593Smuzhiyun				interrupts = <0 36 0x4>;
296*4882a593Smuzhiyun				status = "disabled";
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun			serial@e0000000 {
300*4882a593Smuzhiyun				compatible = "arm,pl011", "arm,primecell";
301*4882a593Smuzhiyun				reg = <0xe0000000 0x1000>;
302*4882a593Smuzhiyun				interrupts = <0 35 0x4>;
303*4882a593Smuzhiyun				status = "disabled";
304*4882a593Smuzhiyun			};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun			adc@e0080000 {
307*4882a593Smuzhiyun				compatible = "st,spear600-adc";
308*4882a593Smuzhiyun				reg = <0xe0080000 0x1000>;
309*4882a593Smuzhiyun				interrupts = <0 12 0x4>;
310*4882a593Smuzhiyun				status = "disabled";
311*4882a593Smuzhiyun			};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			timer@e0380000 {
314*4882a593Smuzhiyun				compatible = "st,spear-timer";
315*4882a593Smuzhiyun				reg = <0xe0380000 0x400>;
316*4882a593Smuzhiyun				interrupts = <0 37 0x4>;
317*4882a593Smuzhiyun			};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun			timer@ec800600 {
320*4882a593Smuzhiyun				compatible = "arm,cortex-a9-twd-timer";
321*4882a593Smuzhiyun				reg = <0xec800600 0x20>;
322*4882a593Smuzhiyun				interrupts = <1 13 0x4>;
323*4882a593Smuzhiyun				status = "disabled";
324*4882a593Smuzhiyun			};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun			wdt@ec800620 {
327*4882a593Smuzhiyun				compatible = "arm,cortex-a9-twd-wdt";
328*4882a593Smuzhiyun				reg = <0xec800620 0x20>;
329*4882a593Smuzhiyun				status = "disabled";
330*4882a593Smuzhiyun			};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun			thermal@e07008c4 {
333*4882a593Smuzhiyun				compatible = "st,thermal-spear1340";
334*4882a593Smuzhiyun				reg = <0xe07008c4 0x4>;
335*4882a593Smuzhiyun				thermal_flags = <0x7000>;
336*4882a593Smuzhiyun			};
337*4882a593Smuzhiyun		};
338*4882a593Smuzhiyun	};
339*4882a593Smuzhiyun};
340