xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/spear1340-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * DTS file for SPEAr1340 Evaluation Baord
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun/include/ "spear1340.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "ST SPEAr1340 Evaluation Board";
13*4882a593Smuzhiyun	compatible = "st,spear1340-evb", "st,spear1340";
14*4882a593Smuzhiyun	#address-cells = <1>;
15*4882a593Smuzhiyun	#size-cells = <1>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	memory {
18*4882a593Smuzhiyun		reg = <0 0x40000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	ahb {
22*4882a593Smuzhiyun		pinmux@e0700000 {
23*4882a593Smuzhiyun			pinctrl-names = "default";
24*4882a593Smuzhiyun			pinctrl-0 = <&state_default>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun			state_default: pinmux {
27*4882a593Smuzhiyun				pads_as_gpio {
28*4882a593Smuzhiyun					st,pins = "pads_as_gpio_grp";
29*4882a593Smuzhiyun					st,function = "pads_as_gpio";
30*4882a593Smuzhiyun				};
31*4882a593Smuzhiyun				fsmc {
32*4882a593Smuzhiyun					st,pins = "fsmc_8bit_grp";
33*4882a593Smuzhiyun					st,function = "fsmc";
34*4882a593Smuzhiyun				};
35*4882a593Smuzhiyun				uart0 {
36*4882a593Smuzhiyun					st,pins = "uart0_grp";
37*4882a593Smuzhiyun					st,function = "uart0";
38*4882a593Smuzhiyun				};
39*4882a593Smuzhiyun				i2c0 {
40*4882a593Smuzhiyun					st,pins = "i2c0_grp";
41*4882a593Smuzhiyun					st,function = "i2c0";
42*4882a593Smuzhiyun				};
43*4882a593Smuzhiyun				i2c1 {
44*4882a593Smuzhiyun					st,pins = "i2c1_grp";
45*4882a593Smuzhiyun					st,function = "i2c1";
46*4882a593Smuzhiyun				};
47*4882a593Smuzhiyun				spdif-in {
48*4882a593Smuzhiyun					st,pins = "spdif_in_grp";
49*4882a593Smuzhiyun					st,function = "spdif_in";
50*4882a593Smuzhiyun				};
51*4882a593Smuzhiyun				spdif-out {
52*4882a593Smuzhiyun					st,pins = "spdif_out_grp";
53*4882a593Smuzhiyun					st,function = "spdif_out";
54*4882a593Smuzhiyun				};
55*4882a593Smuzhiyun				ssp0 {
56*4882a593Smuzhiyun					st,pins = "ssp0_grp", "ssp0_cs1_grp", "ssp0_cs2_grp", "ssp0_cs3_grp";
57*4882a593Smuzhiyun					st,function = "ssp0";
58*4882a593Smuzhiyun				};
59*4882a593Smuzhiyun				smi-pmx {
60*4882a593Smuzhiyun					st,pins = "smi_grp";
61*4882a593Smuzhiyun					st,function = "smi";
62*4882a593Smuzhiyun				};
63*4882a593Smuzhiyun				i2s {
64*4882a593Smuzhiyun					st,pins = "i2s_in_grp", "i2s_out_grp";
65*4882a593Smuzhiyun					st,function = "i2s";
66*4882a593Smuzhiyun				};
67*4882a593Smuzhiyun				gmac {
68*4882a593Smuzhiyun					st,pins = "gmii_grp", "rgmii_grp";
69*4882a593Smuzhiyun					st,function = "gmac";
70*4882a593Smuzhiyun				};
71*4882a593Smuzhiyun				cam0 {
72*4882a593Smuzhiyun					st,pins = "cam0_grp";
73*4882a593Smuzhiyun					st,function = "cam0";
74*4882a593Smuzhiyun				};
75*4882a593Smuzhiyun				cam1 {
76*4882a593Smuzhiyun					st,pins = "cam1_grp";
77*4882a593Smuzhiyun					st,function = "cam1";
78*4882a593Smuzhiyun				};
79*4882a593Smuzhiyun				cam2 {
80*4882a593Smuzhiyun					st,pins = "cam2_grp";
81*4882a593Smuzhiyun					st,function = "cam2";
82*4882a593Smuzhiyun				};
83*4882a593Smuzhiyun				cam3 {
84*4882a593Smuzhiyun					st,pins = "cam3_grp";
85*4882a593Smuzhiyun					st,function = "cam3";
86*4882a593Smuzhiyun				};
87*4882a593Smuzhiyun				cec0 {
88*4882a593Smuzhiyun					st,pins = "cec0_grp";
89*4882a593Smuzhiyun					st,function = "cec0";
90*4882a593Smuzhiyun				};
91*4882a593Smuzhiyun				cec1 {
92*4882a593Smuzhiyun					st,pins = "cec1_grp";
93*4882a593Smuzhiyun					st,function = "cec1";
94*4882a593Smuzhiyun				};
95*4882a593Smuzhiyun				sdhci {
96*4882a593Smuzhiyun					st,pins = "sdhci_grp";
97*4882a593Smuzhiyun					st,function = "sdhci";
98*4882a593Smuzhiyun				};
99*4882a593Smuzhiyun				clcd {
100*4882a593Smuzhiyun					st,pins = "clcd_grp";
101*4882a593Smuzhiyun					st,function = "clcd";
102*4882a593Smuzhiyun				};
103*4882a593Smuzhiyun				sata {
104*4882a593Smuzhiyun					st,pins = "sata_grp";
105*4882a593Smuzhiyun					st,function = "sata";
106*4882a593Smuzhiyun				};
107*4882a593Smuzhiyun				pcie {
108*4882a593Smuzhiyun					st,pins = "pcie_grp";
109*4882a593Smuzhiyun					st,function = "pcie";
110*4882a593Smuzhiyun				};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			};
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		ahci@b1000000 {
116*4882a593Smuzhiyun			status = "okay";
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun		miphy@eb800000 {
120*4882a593Smuzhiyun			status = "okay";
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		dma@ea800000 {
124*4882a593Smuzhiyun			status = "okay";
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		dma@eb000000 {
128*4882a593Smuzhiyun			status = "okay";
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		fsmc: flash@b0000000 {
132*4882a593Smuzhiyun			status = "okay";
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun			partition@0 {
135*4882a593Smuzhiyun				label = "xloader";
136*4882a593Smuzhiyun				reg = <0x0 0x200000>;
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun			partition@200000 {
139*4882a593Smuzhiyun				label = "u-boot";
140*4882a593Smuzhiyun				reg = <0x200000 0x200000>;
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun			partition@400000 {
143*4882a593Smuzhiyun				label = "environment";
144*4882a593Smuzhiyun				reg = <0x400000 0x100000>;
145*4882a593Smuzhiyun			};
146*4882a593Smuzhiyun			partition@500000 {
147*4882a593Smuzhiyun				label = "dtb";
148*4882a593Smuzhiyun				reg = <0x500000 0x100000>;
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun			partition@600000 {
151*4882a593Smuzhiyun				label = "linux";
152*4882a593Smuzhiyun				reg = <0x600000 0xC00000>;
153*4882a593Smuzhiyun			};
154*4882a593Smuzhiyun			partition@1200000 {
155*4882a593Smuzhiyun				label = "rootfs";
156*4882a593Smuzhiyun				reg = <0x1200000 0x0>;
157*4882a593Smuzhiyun			};
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun		gmac0: eth@e2000000 {
161*4882a593Smuzhiyun			phy-mode = "rgmii";
162*4882a593Smuzhiyun			status = "okay";
163*4882a593Smuzhiyun		};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun		sdhci@b3000000 {
166*4882a593Smuzhiyun			status = "okay";
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun		smi: flash@ea000000 {
170*4882a593Smuzhiyun			status = "okay";
171*4882a593Smuzhiyun			clock-rate=<50000000>;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun			flash@e6000000 {
174*4882a593Smuzhiyun				#address-cells = <1>;
175*4882a593Smuzhiyun				#size-cells = <1>;
176*4882a593Smuzhiyun				reg = <0xe6000000 0x800000>;
177*4882a593Smuzhiyun				st,smi-fast-mode;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun				partition@0 {
180*4882a593Smuzhiyun					label = "xloader";
181*4882a593Smuzhiyun					reg = <0x0 0x10000>;
182*4882a593Smuzhiyun				};
183*4882a593Smuzhiyun				partition@10000 {
184*4882a593Smuzhiyun					label = "u-boot";
185*4882a593Smuzhiyun					reg = <0x10000 0x50000>;
186*4882a593Smuzhiyun				};
187*4882a593Smuzhiyun				partition@60000 {
188*4882a593Smuzhiyun					label = "environment";
189*4882a593Smuzhiyun					reg = <0x60000 0x10000>;
190*4882a593Smuzhiyun				};
191*4882a593Smuzhiyun				partition@70000 {
192*4882a593Smuzhiyun					label = "dtb";
193*4882a593Smuzhiyun					reg = <0x70000 0x10000>;
194*4882a593Smuzhiyun				};
195*4882a593Smuzhiyun				partition@80000 {
196*4882a593Smuzhiyun					label = "linux";
197*4882a593Smuzhiyun					reg = <0x80000 0x310000>;
198*4882a593Smuzhiyun				};
199*4882a593Smuzhiyun				partition@390000 {
200*4882a593Smuzhiyun					label = "rootfs";
201*4882a593Smuzhiyun					reg = <0x390000 0x0>;
202*4882a593Smuzhiyun				};
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		ehci@e4800000 {
207*4882a593Smuzhiyun			status = "okay";
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		gpio_keys {
211*4882a593Smuzhiyun			compatible = "gpio-keys";
212*4882a593Smuzhiyun			#address-cells = <1>;
213*4882a593Smuzhiyun			#size-cells = <0>;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun			button@1 {
216*4882a593Smuzhiyun				label = "wakeup";
217*4882a593Smuzhiyun				linux,code = <0x100>;
218*4882a593Smuzhiyun				gpios = <&gpio1 1 0x4>;
219*4882a593Smuzhiyun				debounce-interval = <20>;
220*4882a593Smuzhiyun				wakeup-source;
221*4882a593Smuzhiyun			};
222*4882a593Smuzhiyun		};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		ehci@e5800000 {
225*4882a593Smuzhiyun			status = "okay";
226*4882a593Smuzhiyun		};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun		i2s0: i2s-play@b2400000 {
229*4882a593Smuzhiyun			status = "okay";
230*4882a593Smuzhiyun		};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		i2s1: i2s-rec@b2000000 {
233*4882a593Smuzhiyun			status = "okay";
234*4882a593Smuzhiyun		};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun		incodec: dir-hifi {
237*4882a593Smuzhiyun			compatible = "dummy,dir-hifi";
238*4882a593Smuzhiyun			status = "okay";
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		ohci@e4000000 {
242*4882a593Smuzhiyun			status = "okay";
243*4882a593Smuzhiyun		};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun		ohci@e5000000 {
246*4882a593Smuzhiyun			status = "okay";
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun		outcodec: dit-hifi {
250*4882a593Smuzhiyun			compatible = "dummy,dit-hifi";
251*4882a593Smuzhiyun			status = "okay";
252*4882a593Smuzhiyun		};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun		sound {
255*4882a593Smuzhiyun			compatible = "spear,spear-evb";
256*4882a593Smuzhiyun			audio-controllers = <&spdif0 &spdif1 &i2s0 &i2s1>;
257*4882a593Smuzhiyun			audio-codecs = <&incodec &outcodec &sta529 &sta529>;
258*4882a593Smuzhiyun			codec_dai_name = "dir-hifi", "dit-hifi", "sta529-audio", "sta529-audio";
259*4882a593Smuzhiyun			stream_name = "spdif-cap", "spdif-play", "i2s-play", "i2s-cap";
260*4882a593Smuzhiyun			dai_name = "spdifin-pcm", "spdifout-pcm", "i2s0-pcm", "i2s1-pcm";
261*4882a593Smuzhiyun			nr_controllers = <4>;
262*4882a593Smuzhiyun		        status = "okay";
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun		spdif0: spdif-in@d0100000 {
266*4882a593Smuzhiyun			status = "okay";
267*4882a593Smuzhiyun		};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun		spdif1: spdif-out@d0000000 {
270*4882a593Smuzhiyun			status = "okay";
271*4882a593Smuzhiyun		};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun		apb {
274*4882a593Smuzhiyun			adc@e0080000 {
275*4882a593Smuzhiyun				status = "okay";
276*4882a593Smuzhiyun			};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun			i2s-play@b2400000 {
279*4882a593Smuzhiyun				status = "okay";
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun			i2s-rec@b2000000 {
283*4882a593Smuzhiyun				status = "okay";
284*4882a593Smuzhiyun			};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun			gpio0: gpio@e0600000 {
287*4882a593Smuzhiyun			       status = "okay";
288*4882a593Smuzhiyun			};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun			gpio1: gpio@e0680000 {
291*4882a593Smuzhiyun			       status = "okay";
292*4882a593Smuzhiyun			};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun			gpio@e2800000 {
295*4882a593Smuzhiyun			       status = "okay";
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun			i2c0: i2c@e0280000 {
299*4882a593Smuzhiyun			       status = "okay";
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun				sta529: sta529@1a {
302*4882a593Smuzhiyun					compatible = "st,sta529";
303*4882a593Smuzhiyun					reg = <0x1a>;
304*4882a593Smuzhiyun				};
305*4882a593Smuzhiyun			};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun			i2c1: i2c@b4000000 {
308*4882a593Smuzhiyun			       status = "okay";
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun				eeprom0@56 {
311*4882a593Smuzhiyun					compatible = "st,eeprom";
312*4882a593Smuzhiyun					reg = <0x56>;
313*4882a593Smuzhiyun				};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun				stmpe801@41 {
316*4882a593Smuzhiyun					compatible = "st,stmpe801";
317*4882a593Smuzhiyun					#address-cells = <1>;
318*4882a593Smuzhiyun					#size-cells = <0>;
319*4882a593Smuzhiyun					reg = <0x41>;
320*4882a593Smuzhiyun					interrupts = <4 0x4>;
321*4882a593Smuzhiyun					interrupt-parent = <&gpio0>;
322*4882a593Smuzhiyun					irq-trigger = <0x2>;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun					stmpegpio: stmpe_gpio {
325*4882a593Smuzhiyun						compatible = "st,stmpe-gpio";
326*4882a593Smuzhiyun						gpio-controller;
327*4882a593Smuzhiyun						#gpio-cells = <2>;
328*4882a593Smuzhiyun					};
329*4882a593Smuzhiyun				};
330*4882a593Smuzhiyun			};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun			kbd@e0300000 {
333*4882a593Smuzhiyun				linux,keymap = < 0x00000001
334*4882a593Smuzhiyun						 0x00010002
335*4882a593Smuzhiyun						 0x00020003
336*4882a593Smuzhiyun						 0x00030004
337*4882a593Smuzhiyun						 0x00040005
338*4882a593Smuzhiyun						 0x00050006
339*4882a593Smuzhiyun						 0x00060007
340*4882a593Smuzhiyun						 0x00070008
341*4882a593Smuzhiyun						 0x00080009
342*4882a593Smuzhiyun						 0x0100000a
343*4882a593Smuzhiyun						 0x0101000c
344*4882a593Smuzhiyun						 0x0102000d
345*4882a593Smuzhiyun						 0x0103000e
346*4882a593Smuzhiyun						 0x0104000f
347*4882a593Smuzhiyun						 0x01050010
348*4882a593Smuzhiyun						 0x01060011
349*4882a593Smuzhiyun						 0x01070012
350*4882a593Smuzhiyun						 0x01080013
351*4882a593Smuzhiyun						 0x02000014
352*4882a593Smuzhiyun						 0x02010015
353*4882a593Smuzhiyun						 0x02020016
354*4882a593Smuzhiyun						 0x02030017
355*4882a593Smuzhiyun						 0x02040018
356*4882a593Smuzhiyun						 0x02050019
357*4882a593Smuzhiyun						 0x0206001a
358*4882a593Smuzhiyun						 0x0207001b
359*4882a593Smuzhiyun						 0x0208001c
360*4882a593Smuzhiyun						 0x0300001d
361*4882a593Smuzhiyun						 0x0301001e
362*4882a593Smuzhiyun						 0x0302001f
363*4882a593Smuzhiyun						 0x03030020
364*4882a593Smuzhiyun						 0x03040021
365*4882a593Smuzhiyun						 0x03050022
366*4882a593Smuzhiyun						 0x03060023
367*4882a593Smuzhiyun						 0x03070024
368*4882a593Smuzhiyun						 0x03080025
369*4882a593Smuzhiyun						 0x04000026
370*4882a593Smuzhiyun						 0x04010027
371*4882a593Smuzhiyun						 0x04020028
372*4882a593Smuzhiyun						 0x04030029
373*4882a593Smuzhiyun						 0x0404002a
374*4882a593Smuzhiyun						 0x0405002b
375*4882a593Smuzhiyun						 0x0406002c
376*4882a593Smuzhiyun						 0x0407002d
377*4882a593Smuzhiyun						 0x0408002e
378*4882a593Smuzhiyun						 0x0500002f
379*4882a593Smuzhiyun						 0x05010030
380*4882a593Smuzhiyun						 0x05020031
381*4882a593Smuzhiyun						 0x05030032
382*4882a593Smuzhiyun						 0x05040033
383*4882a593Smuzhiyun						 0x05050034
384*4882a593Smuzhiyun						 0x05060035
385*4882a593Smuzhiyun						 0x05070036
386*4882a593Smuzhiyun						 0x05080037
387*4882a593Smuzhiyun						 0x06000038
388*4882a593Smuzhiyun						 0x06010039
389*4882a593Smuzhiyun						 0x0602003a
390*4882a593Smuzhiyun						 0x0603003b
391*4882a593Smuzhiyun						 0x0604003c
392*4882a593Smuzhiyun						 0x0605003d
393*4882a593Smuzhiyun						 0x0606003e
394*4882a593Smuzhiyun						 0x0607003f
395*4882a593Smuzhiyun						 0x06080040
396*4882a593Smuzhiyun						 0x07000041
397*4882a593Smuzhiyun						 0x07010042
398*4882a593Smuzhiyun						 0x07020043
399*4882a593Smuzhiyun						 0x07030044
400*4882a593Smuzhiyun						 0x07040045
401*4882a593Smuzhiyun						 0x07050046
402*4882a593Smuzhiyun						 0x07060047
403*4882a593Smuzhiyun						 0x07070048
404*4882a593Smuzhiyun						 0x07080049
405*4882a593Smuzhiyun						 0x0800004a
406*4882a593Smuzhiyun						 0x0801004b
407*4882a593Smuzhiyun						 0x0802004c
408*4882a593Smuzhiyun						 0x0803004d
409*4882a593Smuzhiyun						 0x0804004e
410*4882a593Smuzhiyun						 0x0805004f
411*4882a593Smuzhiyun						 0x08060050
412*4882a593Smuzhiyun						 0x08070051
413*4882a593Smuzhiyun						 0x08080052 >;
414*4882a593Smuzhiyun			       autorepeat;
415*4882a593Smuzhiyun			       st,mode = <0>;
416*4882a593Smuzhiyun			       suspended_rate = <2000000>;
417*4882a593Smuzhiyun			       status = "okay";
418*4882a593Smuzhiyun			};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun			rtc@e0580000 {
421*4882a593Smuzhiyun			       status = "okay";
422*4882a593Smuzhiyun			};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun			serial@e0000000 {
425*4882a593Smuzhiyun			       status = "okay";
426*4882a593Smuzhiyun				pinctrl-names = "default";
427*4882a593Smuzhiyun				pinctrl-0 = <>;
428*4882a593Smuzhiyun			};
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun			serial@b4100000 {
431*4882a593Smuzhiyun			       status = "okay";
432*4882a593Smuzhiyun				pinctrl-names = "default";
433*4882a593Smuzhiyun				pinctrl-0 = <>;
434*4882a593Smuzhiyun			};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun			spi0: spi@e0100000 {
437*4882a593Smuzhiyun				status = "okay";
438*4882a593Smuzhiyun				num-cs = <3>;
439*4882a593Smuzhiyun				cs-gpios = <&gpiopinctrl 80 0>, <&gpiopinctrl 24 0>,
440*4882a593Smuzhiyun					   <&gpiopinctrl 85 0>;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun				m25p80@0 {
443*4882a593Smuzhiyun					compatible = "m25p80";
444*4882a593Smuzhiyun					reg = <0>;
445*4882a593Smuzhiyun					spi-max-frequency = <12000000>;
446*4882a593Smuzhiyun					spi-cpol;
447*4882a593Smuzhiyun					spi-cpha;
448*4882a593Smuzhiyun					pl022,hierarchy = <0>;
449*4882a593Smuzhiyun					pl022,interface = <0>;
450*4882a593Smuzhiyun					pl022,slave-tx-disable;
451*4882a593Smuzhiyun					pl022,com-mode = <0x2>;
452*4882a593Smuzhiyun					pl022,rx-level-trig = <0>;
453*4882a593Smuzhiyun					pl022,tx-level-trig = <0>;
454*4882a593Smuzhiyun					pl022,ctrl-len = <0x11>;
455*4882a593Smuzhiyun					pl022,wait-state = <0>;
456*4882a593Smuzhiyun					pl022,duplex = <0>;
457*4882a593Smuzhiyun				};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun				stmpe610@1 {
460*4882a593Smuzhiyun					compatible = "st,stmpe610";
461*4882a593Smuzhiyun					spi-max-frequency = <1000000>;
462*4882a593Smuzhiyun					spi-cpha;
463*4882a593Smuzhiyun					reg = <1>;
464*4882a593Smuzhiyun					pl022,hierarchy = <0>;
465*4882a593Smuzhiyun					pl022,interface = <0>;
466*4882a593Smuzhiyun					pl022,slave-tx-disable;
467*4882a593Smuzhiyun					pl022,com-mode = <0>;
468*4882a593Smuzhiyun					pl022,rx-level-trig = <0>;
469*4882a593Smuzhiyun					pl022,tx-level-trig = <0>;
470*4882a593Smuzhiyun					pl022,ctrl-len = <0x7>;
471*4882a593Smuzhiyun					pl022,wait-state = <0>;
472*4882a593Smuzhiyun					pl022,duplex = <0>;
473*4882a593Smuzhiyun					interrupts = <100 0>;
474*4882a593Smuzhiyun					interrupt-parent = <&gpiopinctrl>;
475*4882a593Smuzhiyun					irq-trigger = <0x2>;
476*4882a593Smuzhiyun					#address-cells = <1>;
477*4882a593Smuzhiyun					#size-cells = <0>;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun					stmpe_touchscreen {
480*4882a593Smuzhiyun						compatible = "st,stmpe-ts";
481*4882a593Smuzhiyun						ts,sample-time = <4>;
482*4882a593Smuzhiyun						ts,mod-12b = <1>;
483*4882a593Smuzhiyun						ts,ref-sel = <0>;
484*4882a593Smuzhiyun						ts,adc-freq = <1>;
485*4882a593Smuzhiyun						ts,ave-ctrl = <1>;
486*4882a593Smuzhiyun						ts,touch-det-delay = <2>;
487*4882a593Smuzhiyun						ts,settling = <2>;
488*4882a593Smuzhiyun						ts,fraction-z = <7>;
489*4882a593Smuzhiyun						ts,i-drive = <1>;
490*4882a593Smuzhiyun					};
491*4882a593Smuzhiyun				};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun				spidev@2 {
494*4882a593Smuzhiyun					compatible = "spidev";
495*4882a593Smuzhiyun					reg = <2>;
496*4882a593Smuzhiyun					spi-max-frequency = <25000000>;
497*4882a593Smuzhiyun					spi-cpha;
498*4882a593Smuzhiyun					pl022,hierarchy = <0>;
499*4882a593Smuzhiyun					pl022,interface = <0>;
500*4882a593Smuzhiyun					pl022,slave-tx-disable;
501*4882a593Smuzhiyun					pl022,com-mode = <0x2>;
502*4882a593Smuzhiyun					pl022,rx-level-trig = <0>;
503*4882a593Smuzhiyun					pl022,tx-level-trig = <0>;
504*4882a593Smuzhiyun					pl022,ctrl-len = <0x11>;
505*4882a593Smuzhiyun					pl022,wait-state = <0>;
506*4882a593Smuzhiyun					pl022,duplex = <0>;
507*4882a593Smuzhiyun				};
508*4882a593Smuzhiyun			};
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun			timer@ec800600 {
511*4882a593Smuzhiyun				status = "okay";
512*4882a593Smuzhiyun			};
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun			wdt@ec800620 {
515*4882a593Smuzhiyun			       status = "okay";
516*4882a593Smuzhiyun			};
517*4882a593Smuzhiyun		};
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun};
520