xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "socfpga_cyclone5_mcv.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	model = "Aries/DENX MCV EVK";
10*4882a593Smuzhiyun	compatible = "denx,mcvevk", "altr,socfpga-cyclone5", "altr,socfpga";
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	aliases {
13*4882a593Smuzhiyun		ethernet0 = &gmac0;
14*4882a593Smuzhiyun		stmpe-i2c0 = &stmpe1;
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun&can0 {
23*4882a593Smuzhiyun	status = "okay";
24*4882a593Smuzhiyun};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun&can1 {
27*4882a593Smuzhiyun	status = "okay";
28*4882a593Smuzhiyun};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun&gmac0 {
31*4882a593Smuzhiyun	phy-mode = "rgmii";
32*4882a593Smuzhiyun	status = "okay";
33*4882a593Smuzhiyun};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun&gpio0 {	/* GPIO  0 ... 28 */
36*4882a593Smuzhiyun	status = "okay";
37*4882a593Smuzhiyun};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun&gpio1 {	/* GPIO 29 ... 57 */
40*4882a593Smuzhiyun	status = "okay";
41*4882a593Smuzhiyun};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun&gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
44*4882a593Smuzhiyun	status = "okay";
45*4882a593Smuzhiyun};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun&i2c0 {
48*4882a593Smuzhiyun	status = "okay";
49*4882a593Smuzhiyun	clock-frequency = <100000>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	stmpe1: stmpe811@41 {
52*4882a593Smuzhiyun		compatible = "st,stmpe811";
53*4882a593Smuzhiyun		#address-cells = <1>;
54*4882a593Smuzhiyun		#size-cells = <0>;
55*4882a593Smuzhiyun		reg = <0x41>;
56*4882a593Smuzhiyun		id = <0>;
57*4882a593Smuzhiyun		blocks = <0x5>;
58*4882a593Smuzhiyun		irq-gpio = <&portb 28 0x4>;     /* GPIO 57, trig. level HI */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		stmpe_touchscreen {
61*4882a593Smuzhiyun			compatible = "st,stmpe-ts";
62*4882a593Smuzhiyun			ts,sample-time = <4>;
63*4882a593Smuzhiyun			ts,mod-12b = <1>;
64*4882a593Smuzhiyun			ts,ref-sel = <0>;
65*4882a593Smuzhiyun			ts,adc-freq = <1>;
66*4882a593Smuzhiyun			ts,ave-ctrl = <1>;
67*4882a593Smuzhiyun			ts,touch-det-delay = <3>;
68*4882a593Smuzhiyun			ts,settling = <4>;
69*4882a593Smuzhiyun			ts,fraction-z = <7>;
70*4882a593Smuzhiyun			ts,i-drive = <1>;
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun&uart0 {
76*4882a593Smuzhiyun	status = "okay";
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&usb1 {
80*4882a593Smuzhiyun	status = "okay";
81*4882a593Smuzhiyun};
82