1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016 Atmel, 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun#include "sama5d3xcm_cmp.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun compatible = "atmel,sama5d3xmb-cmp", "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun ahb { 13*4882a593Smuzhiyun apb { 14*4882a593Smuzhiyun mmc0: mmc@f0000000 { 15*4882a593Smuzhiyun pinctrl-names = "default"; 16*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 17*4882a593Smuzhiyun status = "okay"; 18*4882a593Smuzhiyun slot@0 { 19*4882a593Smuzhiyun reg = <0>; 20*4882a593Smuzhiyun bus-width = <4>; 21*4882a593Smuzhiyun cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun spi0: spi@f0004000 { 26*4882a593Smuzhiyun dmas = <0>, <0>; /* Do not use DMA for spi0 */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun m25p80@0 { 29*4882a593Smuzhiyun compatible = "atmel,at25df321a"; 30*4882a593Smuzhiyun spi-max-frequency = <50000000>; 31*4882a593Smuzhiyun reg = <0>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun ssc0: ssc@f0008000 { 36*4882a593Smuzhiyun atmel,clk-from-rk-pin; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* 40*4882a593Smuzhiyun * i2c0 conflicts with ISI: 41*4882a593Smuzhiyun * disable it to allow the use of ISI 42*4882a593Smuzhiyun * can not enable audio when i2c0 disabled 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun i2c0: i2c@f0014000 { 45*4882a593Smuzhiyun wm8904: wm8904@1a { 46*4882a593Smuzhiyun compatible = "wlf,wm8904"; 47*4882a593Smuzhiyun reg = <0x1a>; 48*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_SYSTEM 8>; 49*4882a593Smuzhiyun clock-names = "mclk"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun i2c1: i2c@f0018000 { 54*4882a593Smuzhiyun ov2640: camera@30 { 55*4882a593Smuzhiyun compatible = "ovti,ov2640"; 56*4882a593Smuzhiyun reg = <0x30>; 57*4882a593Smuzhiyun pinctrl-names = "default"; 58*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; 59*4882a593Smuzhiyun resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>; 60*4882a593Smuzhiyun pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun /* use pck1 for the master clock of ov2640 */ 62*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_SYSTEM 9>; 63*4882a593Smuzhiyun clock-names = "xvclk"; 64*4882a593Smuzhiyun assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; 65*4882a593Smuzhiyun assigned-clock-rates = <25000000>; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun port { 68*4882a593Smuzhiyun ov2640_0: endpoint { 69*4882a593Smuzhiyun remote-endpoint = <&isi_0>; 70*4882a593Smuzhiyun bus-width = <8>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun usart1: serial@f0020000 { 77*4882a593Smuzhiyun dmas = <0>, <0>; /* Do not use DMA for usart1 */ 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun isi: isi@f0034000 { 84*4882a593Smuzhiyun port { 85*4882a593Smuzhiyun isi_0: endpoint { 86*4882a593Smuzhiyun remote-endpoint = <&ov2640_0>; 87*4882a593Smuzhiyun bus-width = <8>; 88*4882a593Smuzhiyun vsync-active = <1>; 89*4882a593Smuzhiyun hsync-active = <1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun mmc1: mmc@f8000000 { 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun slot@0 { 99*4882a593Smuzhiyun reg = <0>; 100*4882a593Smuzhiyun bus-width = <4>; 101*4882a593Smuzhiyun cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun adc0: adc@f8018000 { 106*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 107*4882a593Smuzhiyun pinctrl-0 = < 108*4882a593Smuzhiyun &pinctrl_adc0_adtrg 109*4882a593Smuzhiyun &pinctrl_adc0_ad0 110*4882a593Smuzhiyun &pinctrl_adc0_ad1 111*4882a593Smuzhiyun &pinctrl_adc0_ad2 112*4882a593Smuzhiyun &pinctrl_adc0_ad3 113*4882a593Smuzhiyun &pinctrl_adc0_ad4 114*4882a593Smuzhiyun >; 115*4882a593Smuzhiyun pinctrl-1 = < 116*4882a593Smuzhiyun &pinctrl_adc0_adtrg_sleep 117*4882a593Smuzhiyun &pinctrl_adc0_ad0_sleep 118*4882a593Smuzhiyun &pinctrl_adc0_ad1_sleep 119*4882a593Smuzhiyun &pinctrl_adc0_ad2_sleep 120*4882a593Smuzhiyun &pinctrl_adc0_ad3_sleep 121*4882a593Smuzhiyun &pinctrl_adc0_ad4_sleep 122*4882a593Smuzhiyun >; 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun macb1: ethernet@f802c000 { 127*4882a593Smuzhiyun phy-mode = "rmii"; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #address-cells = <1>; 130*4882a593Smuzhiyun #size-cells = <0>; 131*4882a593Smuzhiyun phy0: ethernet-phy@1 { 132*4882a593Smuzhiyun /*interrupt-parent = <&pioE>;*/ 133*4882a593Smuzhiyun /*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/ 134*4882a593Smuzhiyun reg = <1>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun pinctrl@fffff200 { 139*4882a593Smuzhiyun adc0 { 140*4882a593Smuzhiyun pinctrl_adc0_adtrg_sleep: adc0_adtrg_1 { 141*4882a593Smuzhiyun atmel,pins = 142*4882a593Smuzhiyun <AT91_PIOD 19 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun pinctrl_adc0_ad0_sleep: adc0_ad0_1 { 145*4882a593Smuzhiyun atmel,pins = 146*4882a593Smuzhiyun <AT91_PIOD 20 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun pinctrl_adc0_ad1_sleep: adc0_ad1_1 { 149*4882a593Smuzhiyun atmel,pins = 150*4882a593Smuzhiyun <AT91_PIOD 21 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun pinctrl_adc0_ad2_sleep: adc0_ad2_1 { 153*4882a593Smuzhiyun atmel,pins = 154*4882a593Smuzhiyun <AT91_PIOD 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun pinctrl_adc0_ad3_sleep: adc0_ad3_1 { 157*4882a593Smuzhiyun atmel,pins = 158*4882a593Smuzhiyun <AT91_PIOD 23 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun pinctrl_adc0_ad4_sleep: adc0_ad4_1 { 161*4882a593Smuzhiyun atmel,pins = 162*4882a593Smuzhiyun <AT91_PIOD 24 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun board { 167*4882a593Smuzhiyun pinctrl_gpio_keys: gpio_keys { 168*4882a593Smuzhiyun atmel,pins = 169*4882a593Smuzhiyun <AT91_PIOE 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun pinctrl_mmc0_cd: mmc0_cd { 173*4882a593Smuzhiyun atmel,pins = 174*4882a593Smuzhiyun <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun pinctrl_mmc1_cd: mmc1_cd { 178*4882a593Smuzhiyun atmel,pins = 179*4882a593Smuzhiyun <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { 183*4882a593Smuzhiyun atmel,pins = 184*4882a593Smuzhiyun <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 { 188*4882a593Smuzhiyun atmel,pins = 189*4882a593Smuzhiyun <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun pinctrl_sensor_reset: sensor_reset-0 { 193*4882a593Smuzhiyun atmel,pins = 194*4882a593Smuzhiyun <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun pinctrl_sensor_power: sensor_power-0 { 198*4882a593Smuzhiyun atmel,pins = 199*4882a593Smuzhiyun <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun pinctrl_usba_vbus: usba_vbus { 203*4882a593Smuzhiyun atmel,pins = 204*4882a593Smuzhiyun <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun dbgu: serial@ffffee00 { 210*4882a593Smuzhiyun dmas = <0>, <0>; /* Do not use DMA for dbgu */ 211*4882a593Smuzhiyun status = "okay"; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun watchdog@fffffe40 { 215*4882a593Smuzhiyun status = "okay"; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun usb0: gadget@500000 { 220*4882a593Smuzhiyun atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; 221*4882a593Smuzhiyun pinctrl-names = "default"; 222*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usba_vbus>; 223*4882a593Smuzhiyun status = "okay"; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun sound { 228*4882a593Smuzhiyun compatible = "atmel,asoc-wm8904"; 229*4882a593Smuzhiyun pinctrl-names = "default"; 230*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun atmel,model = "wm8904 @ SAMA5D3EK"; 233*4882a593Smuzhiyun atmel,audio-routing = 234*4882a593Smuzhiyun "Headphone Jack", "HPOUTL", 235*4882a593Smuzhiyun "Headphone Jack", "HPOUTR", 236*4882a593Smuzhiyun "IN2L", "Line In Jack", 237*4882a593Smuzhiyun "IN2R", "Line In Jack", 238*4882a593Smuzhiyun "Mic", "MICBIAS", 239*4882a593Smuzhiyun "IN1L", "Mic"; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun atmel,ssc-controller = <&ssc0>; 242*4882a593Smuzhiyun atmel,audio-codec = <&wm8904>; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun status = "disabled"; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun /* Conflict with LCD pins */ 248*4882a593Smuzhiyun gpio_keys { 249*4882a593Smuzhiyun compatible = "gpio-keys"; 250*4882a593Smuzhiyun status = "okay"; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun #address-cells = <1>; 253*4882a593Smuzhiyun #size-cells = <0>; 254*4882a593Smuzhiyun pinctrl-names = "default"; 255*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_gpio_keys>; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun pb_user1 { 258*4882a593Smuzhiyun label = "pb_user1"; 259*4882a593Smuzhiyun gpios = <&pioE 27 GPIO_ACTIVE_HIGH>; 260*4882a593Smuzhiyun linux,code = <0x100>; 261*4882a593Smuzhiyun wakeup-source; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun}; 265