xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (C) 2016 Atmel,
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	compatible = "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	chosen {
12*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
13*4882a593Smuzhiyun	};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	memory@20000000 {
16*4882a593Smuzhiyun		reg = <0x20000000 0x20000000>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	clocks {
20*4882a593Smuzhiyun		slow_xtal {
21*4882a593Smuzhiyun			clock-frequency = <32768>;
22*4882a593Smuzhiyun		};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		main_xtal {
25*4882a593Smuzhiyun			clock-frequency = <12000000>;
26*4882a593Smuzhiyun		};
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	ahb {
30*4882a593Smuzhiyun		apb {
31*4882a593Smuzhiyun			spi0: spi@f0004000 {
32*4882a593Smuzhiyun				cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
33*4882a593Smuzhiyun			};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun			tcb0: timer@f0010000 {
36*4882a593Smuzhiyun				timer@0 {
37*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
38*4882a593Smuzhiyun					reg = <0>;
39*4882a593Smuzhiyun				};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun				timer@1 {
42*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
43*4882a593Smuzhiyun					reg = <1>;
44*4882a593Smuzhiyun				};
45*4882a593Smuzhiyun			};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun			macb0: ethernet@f0028000 {
48*4882a593Smuzhiyun				phy-mode = "rgmii";
49*4882a593Smuzhiyun				#address-cells = <1>;
50*4882a593Smuzhiyun				#size-cells = <0>;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun				ethernet-phy@1 {
53*4882a593Smuzhiyun					reg = <0x1>;
54*4882a593Smuzhiyun					interrupt-parent = <&pioB>;
55*4882a593Smuzhiyun					interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
56*4882a593Smuzhiyun					txen-skew-ps = <800>;
57*4882a593Smuzhiyun					txc-skew-ps = <3000>;
58*4882a593Smuzhiyun					rxdv-skew-ps = <400>;
59*4882a593Smuzhiyun					rxc-skew-ps = <3000>;
60*4882a593Smuzhiyun					rxd0-skew-ps = <400>;
61*4882a593Smuzhiyun					rxd1-skew-ps = <400>;
62*4882a593Smuzhiyun					rxd2-skew-ps = <400>;
63*4882a593Smuzhiyun					rxd3-skew-ps = <400>;
64*4882a593Smuzhiyun				};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun				ethernet-phy@7 {
67*4882a593Smuzhiyun					reg = <0x7>;
68*4882a593Smuzhiyun					interrupt-parent = <&pioB>;
69*4882a593Smuzhiyun					interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
70*4882a593Smuzhiyun					txen-skew-ps = <800>;
71*4882a593Smuzhiyun					txc-skew-ps = <3000>;
72*4882a593Smuzhiyun					rxdv-skew-ps = <400>;
73*4882a593Smuzhiyun					rxc-skew-ps = <3000>;
74*4882a593Smuzhiyun					rxd0-skew-ps = <400>;
75*4882a593Smuzhiyun					rxd1-skew-ps = <400>;
76*4882a593Smuzhiyun					rxd2-skew-ps = <400>;
77*4882a593Smuzhiyun					rxd3-skew-ps = <400>;
78*4882a593Smuzhiyun				};
79*4882a593Smuzhiyun			};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun			i2c1: i2c@f0018000 {
82*4882a593Smuzhiyun				pmic: act8865@5b {
83*4882a593Smuzhiyun					compatible = "active-semi,act8865";
84*4882a593Smuzhiyun					reg = <0x5b>;
85*4882a593Smuzhiyun					status = "disabled";
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun					regulators {
88*4882a593Smuzhiyun						vcc_1v8_reg: DCDC_REG1 {
89*4882a593Smuzhiyun							regulator-name = "VCC_1V8";
90*4882a593Smuzhiyun							regulator-min-microvolt = <1800000>;
91*4882a593Smuzhiyun							regulator-max-microvolt = <1800000>;
92*4882a593Smuzhiyun							regulator-always-on;
93*4882a593Smuzhiyun						};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun						vcc_1v2_reg: DCDC_REG2 {
96*4882a593Smuzhiyun							regulator-name = "VCC_1V2";
97*4882a593Smuzhiyun							regulator-min-microvolt = <1100000>;
98*4882a593Smuzhiyun							regulator-max-microvolt = <1300000>;
99*4882a593Smuzhiyun							regulator-always-on;
100*4882a593Smuzhiyun						};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun						vcc_3v3_reg: DCDC_REG3 {
103*4882a593Smuzhiyun							regulator-name = "VCC_3V3";
104*4882a593Smuzhiyun							regulator-min-microvolt = <3300000>;
105*4882a593Smuzhiyun							regulator-max-microvolt = <3300000>;
106*4882a593Smuzhiyun							regulator-always-on;
107*4882a593Smuzhiyun						};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun						vddana_reg: LDO_REG1 {
110*4882a593Smuzhiyun							regulator-name = "VDDANA";
111*4882a593Smuzhiyun							regulator-min-microvolt = <3300000>;
112*4882a593Smuzhiyun							regulator-max-microvolt = <3300000>;
113*4882a593Smuzhiyun							regulator-always-on;
114*4882a593Smuzhiyun						};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun						vddfuse_reg: LDO_REG2 {
117*4882a593Smuzhiyun							regulator-name = "FUSE_2V5";
118*4882a593Smuzhiyun							regulator-min-microvolt = <2500000>;
119*4882a593Smuzhiyun							regulator-max-microvolt = <2500000>;
120*4882a593Smuzhiyun						};
121*4882a593Smuzhiyun					};
122*4882a593Smuzhiyun				};
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		ebi: ebi@10000000 {
127*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_ebi_nand_addr>;
128*4882a593Smuzhiyun			pinctrl-names = "default";
129*4882a593Smuzhiyun			status = "okay";
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			nand_controller: nand-controller {
132*4882a593Smuzhiyun				status = "okay";
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun				nand@3 {
135*4882a593Smuzhiyun					reg = <0x3 0x0 0x2>;
136*4882a593Smuzhiyun					atmel,rb = <0>;
137*4882a593Smuzhiyun					nand-bus-width = <8>;
138*4882a593Smuzhiyun					nand-ecc-mode = "hw";
139*4882a593Smuzhiyun					nand-ecc-strength = <4>;
140*4882a593Smuzhiyun					nand-ecc-step-size = <512>;
141*4882a593Smuzhiyun					nand-on-flash-bbt;
142*4882a593Smuzhiyun					label = "atmel_nand";
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun					partitions {
145*4882a593Smuzhiyun						compatible = "fixed-partitions";
146*4882a593Smuzhiyun						#address-cells = <1>;
147*4882a593Smuzhiyun						#size-cells = <1>;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun						at91bootstrap@0 {
150*4882a593Smuzhiyun							label = "at91bootstrap";
151*4882a593Smuzhiyun							reg = <0x0 0x40000>;
152*4882a593Smuzhiyun						};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun						bootloader@40000 {
155*4882a593Smuzhiyun							label = "bootloader";
156*4882a593Smuzhiyun							reg = <0x40000 0x80000>;
157*4882a593Smuzhiyun						};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun						bootloaderenv@c0000 {
160*4882a593Smuzhiyun							label = "bootloader env";
161*4882a593Smuzhiyun							reg = <0xc0000 0xc0000>;
162*4882a593Smuzhiyun						};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun						dtb@180000 {
165*4882a593Smuzhiyun							label = "device tree";
166*4882a593Smuzhiyun							reg = <0x180000 0x80000>;
167*4882a593Smuzhiyun						};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun						kernel@200000 {
170*4882a593Smuzhiyun							label = "kernel";
171*4882a593Smuzhiyun							reg = <0x200000 0x600000>;
172*4882a593Smuzhiyun						};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun						rootfs@800000 {
175*4882a593Smuzhiyun							label = "rootfs";
176*4882a593Smuzhiyun							reg = <0x800000 0x0f800000>;
177*4882a593Smuzhiyun						};
178*4882a593Smuzhiyun					};
179*4882a593Smuzhiyun				};
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun		};
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	leds {
185*4882a593Smuzhiyun		compatible = "gpio-leds";
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		d2 {
188*4882a593Smuzhiyun			label = "d2";
189*4882a593Smuzhiyun			gpios = <&pioE 25 GPIO_ACTIVE_LOW>;
190*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun};
194