xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1126-ipc2-ddr3-v10.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7#include "rv1126.dtsi"
8#include "rv1126-ipc.dtsi"
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Rockchip RV1126 IPC2 DDR3 V10 Board";
13	compatible = "rockchip,rv1126-ipc2-ddr3-v10", "rockchip,rv1126";
14
15	adc-keys {
16		compatible = "adc-keys";
17		io-channels = <&saradc 0>;
18		io-channel-names = "buttons";
19		poll-interval = <100>;
20		keyup-threshold-microvolt = <1800000>;
21
22		recovery {
23			label = "Volum_up";
24			linux,code = <KEY_VOLUMEUP>;
25			press-threshold-microvolt = <0>;
26		};
27	};
28
29	rk809_sound: rk809-sound {
30		compatible = "simple-audio-card";
31		simple-audio-card,format = "i2s";
32		simple-audio-card,name = "rockchip,rk809-codec";
33		simple-audio-card,mclk-fs = <256>;
34		simple-audio-card,widgets =
35			"Microphone", "Mic Jack",
36			"Headphone", "Headphone Jack";
37		simple-audio-card,routing =
38			"Mic Jack", "MICBIAS1",
39			"IN1P", "Mic Jack",
40			"Headphone Jack", "HPOL",
41			"Headphone Jack", "HPOR";
42		simple-audio-card,cpu {
43			sound-dai = <&i2s0_8ch>;
44		};
45		simple-audio-card,codec {
46			sound-dai = <&rk809_codec>;
47		};
48	};
49};
50
51&csi_dphy0 {
52	status = "okay";
53
54	ports {
55		#address-cells = <1>;
56		#size-cells = <0>;
57		port@0 {
58			reg = <0>;
59			#address-cells = <1>;
60			#size-cells = <0>;
61
62			mipi_in_ucam0: endpoint@1 {
63				reg = <1>;
64				remote-endpoint = <&ucam_out0>;
65				data-lanes = <1 2 3 4>;
66			};
67		};
68
69		port@1 {
70			reg = <1>;
71			#address-cells = <1>;
72			#size-cells = <0>;
73
74			csidphy0_out: endpoint@0 {
75				reg = <0>;
76				remote-endpoint = <&isp_in>;
77			};
78		};
79	};
80};
81
82&emmc {
83	bus-width = <8>;
84	cap-mmc-highspeed;
85	non-removable;
86	mmc-hs200-1_8v;
87	rockchip,default-sample-phase = <90>;
88	no-sdio;
89	no-sd;
90	/delete-property/ pinctrl-names;
91	/delete-property/ pinctrl-0;
92	status = "okay";
93};
94
95&gmac {
96	phy-mode = "rmii";
97	clock_in_out = "output";
98
99	snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
100	snps,reset-active-low;
101	snps,reset-delays-us = <0 50000 50000>;
102
103	assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>;
104	assigned-clock-parents = <&cru CLK_GMAC_SRC_M0>, <&cru RMII_MODE_CLK>;
105	assigned-clock-rates = <50000000>;
106
107	pinctrl-names = "default";
108	pinctrl-0 = <&rmiim0_miim &rgmiim0_rxer &rmiim0_bus2 &rgmiim0_mclkinout_level0>;
109
110	phy-handle = <&phy>;
111	status = "okay";
112};
113
114&i2c0 {
115	status = "okay";
116	clock-frequency = <400000>;
117
118	rk809: pmic@20 {
119		compatible = "rockchip,rk809";
120		reg = <0x20>;
121		interrupt-parent = <&gpio0>;
122		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
123		pinctrl-names = "default", "pmic-sleep",
124			"pmic-power-off", "pmic-reset";
125		pinctrl-0 = <&pmic_int>;
126		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
127		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
128		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
129		rockchip,system-power-controller;
130		wakeup-source;
131		#clock-cells = <1>;
132		clock-output-names = "rk808-clkout1", "rk808-clkout2";
133		/* 0: rst the pmic, 1: rst regs (default in codes) */
134		pmic-reset-func = <0>;
135
136		vcc1-supply = <&vcc5v0_sys>;
137		vcc2-supply = <&vcc5v0_sys>;
138		vcc3-supply = <&vcc5v0_sys>;
139		vcc4-supply = <&vcc5v0_sys>;
140		vcc5-supply = <&vcc_buck5>;
141		vcc6-supply = <&vcc_buck5>;
142		vcc7-supply = <&vcc5v0_sys>;
143		vcc8-supply = <&vcc3v3_sys>;
144		vcc9-supply = <&vcc5v0_sys>;
145
146		pwrkey {
147			status = "okay";
148		};
149
150		pinctrl_rk8xx: pinctrl_rk8xx {
151			gpio-controller;
152			#gpio-cells = <2>;
153
154			/omit-if-no-ref/
155			rk817_slppin_null: rk817_slppin_null {
156				pins = "gpio_slp";
157				function = "pin_fun0";
158			};
159
160			/omit-if-no-ref/
161			rk817_slppin_slp: rk817_slppin_slp {
162				pins = "gpio_slp";
163				function = "pin_fun1";
164			};
165
166			/omit-if-no-ref/
167			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
168				pins = "gpio_slp";
169				function = "pin_fun2";
170			};
171
172			/omit-if-no-ref/
173			rk817_slppin_rst: rk817_slppin_rst {
174				pins = "gpio_slp";
175				function = "pin_fun3";
176			};
177		};
178
179		regulators {
180			vdd_logic: DCDC_REG1 {
181				regulator-always-on;
182				regulator-boot-on;
183				regulator-min-microvolt = <800000>;
184				regulator-max-microvolt = <1350000>;
185				regulator-ramp-delay = <6001>;
186				regulator-initial-mode = <0x2>;
187				regulator-name = "vdd_logic";
188				regulator-state-mem {
189					regulator-on-in-suspend;
190					regulator-suspend-microvolt = <800000>;
191				};
192			};
193
194			vdd_arm: DCDC_REG2 {
195				regulator-always-on;
196				regulator-boot-on;
197				regulator-min-microvolt = <800000>;
198				regulator-max-microvolt = <1350000>;
199				regulator-ramp-delay = <6001>;
200				regulator-initial-mode = <0x2>;
201				regulator-name = "vdd_arm";
202				regulator-state-mem {
203					regulator-off-in-suspend;
204				};
205			};
206
207			vcc_ddr: DCDC_REG3 {
208				regulator-always-on;
209				regulator-boot-on;
210				regulator-initial-mode = <0x2>;
211				regulator-name = "vcc_ddr";
212				regulator-state-mem {
213					regulator-on-in-suspend;
214				};
215			};
216
217			vcc3v3_sys: DCDC_REG4 {
218				regulator-always-on;
219				regulator-boot-on;
220				regulator-min-microvolt = <3300000>;
221				regulator-max-microvolt = <3300000>;
222				regulator-initial-mode = <0x2>;
223				regulator-name = "vcc3v3_sys";
224				regulator-state-mem {
225					regulator-on-in-suspend;
226					regulator-suspend-microvolt = <3300000>;
227				};
228			};
229
230			vcc_buck5: DCDC_REG5 {
231				regulator-always-on;
232				regulator-boot-on;
233				regulator-min-microvolt = <2200000>;
234				regulator-max-microvolt = <2200000>;
235				regulator-name = "vcc_buck5";
236				regulator-state-mem {
237					regulator-on-in-suspend;
238					regulator-suspend-microvolt = <2200000>;
239				};
240			};
241
242			vcc_0v8: LDO_REG1 {
243				regulator-always-on;
244				regulator-boot-on;
245				regulator-min-microvolt = <800000>;
246				regulator-max-microvolt = <800000>;
247				regulator-name = "vcc_0v8";
248				regulator-state-mem {
249					regulator-off-in-suspend;
250				};
251			};
252
253			vcc1v8_pmu: LDO_REG2 {
254				regulator-always-on;
255				regulator-boot-on;
256				regulator-min-microvolt = <1800000>;
257				regulator-max-microvolt = <1800000>;
258				regulator-name = "vcc1v8_pmu";
259				regulator-state-mem {
260					regulator-on-in-suspend;
261					regulator-suspend-microvolt = <1800000>;
262				};
263			};
264
265			vdd0v8_pmu: LDO_REG3 {
266				regulator-always-on;
267				regulator-boot-on;
268				regulator-min-microvolt = <800000>;
269				regulator-max-microvolt = <800000>;
270				regulator-name = "vcc0v8_pmu";
271				regulator-state-mem {
272					regulator-on-in-suspend;
273					regulator-suspend-microvolt = <800000>;
274				};
275			};
276
277			vcc_1v8: LDO_REG4 {
278				regulator-always-on;
279				regulator-boot-on;
280				regulator-min-microvolt = <1800000>;
281				regulator-max-microvolt = <1800000>;
282				regulator-name = "vcc_1v8";
283				regulator-state-mem {
284					regulator-on-in-suspend;
285					regulator-suspend-microvolt = <1800000>;
286				};
287			};
288
289			vcc_dovdd: LDO_REG5 {
290				regulator-boot-on;
291				regulator-min-microvolt = <1800000>;
292				regulator-max-microvolt = <1800000>;
293				regulator-name = "vcc_dovdd";
294				regulator-state-mem {
295					regulator-off-in-suspend;
296				};
297			};
298
299			vcc_dvdd: LDO_REG6 {
300				regulator-min-microvolt = <1200000>;
301				regulator-max-microvolt = <1200000>;
302				regulator-name = "vcc_dvdd";
303				regulator-state-mem {
304					regulator-off-in-suspend;
305				};
306			};
307
308			vcc_avdd: LDO_REG7 {
309				regulator-min-microvolt = <2800000>;
310				regulator-max-microvolt = <2800000>;
311				regulator-name = "vcc_avdd";
312				regulator-state-mem {
313					regulator-off-in-suspend;
314				};
315			};
316
317			vcc_ldo8: LDO_REG8 {
318				regulator-always-off;
319				regulator-boot-off;
320				regulator-name = "vcc_ldo8";
321				regulator-state-mem {
322					regulator-off-in-suspend;
323				};
324			};
325
326			vcc_ldo9: LDO_REG9 {
327				regulator-always-off;
328				regulator-boot-off;
329				regulator-name = "vcc_ldo9";
330				regulator-state-mem {
331					regulator-off-in-suspend;
332				};
333			};
334
335			vcc5v0_host: SWITCH_REG1 {
336				regulator-name = "vcc5v0_host";
337			};
338
339			vcc_3v3: SWITCH_REG2 {
340				regulator-always-on;
341				regulator-boot-on;
342				regulator-name = "vcc_3v3";
343			};
344		};
345
346		rk809_codec: codec {
347			#sound-dai-cells = <0>;
348			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
349			clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
350			clock-names = "mclk";
351			pinctrl-names = "default";
352			assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
353			assigned-clock-parents = <&cru MCLK_I2S0_TX>;
354			pinctrl-0 = <&i2s0m0_mclk>;
355			hp-volume = <20>;
356			spk-volume = <3>;
357		};
358	};
359};
360
361&i2c1 {
362	status = "okay";
363	clock-frequency = <400000>;
364
365	os04a10: os04a10@36 {
366		compatible = "ovti,os04a10";
367		reg = <0x36>;
368		clocks = <&cru CLK_MIPICSI_OUT>;
369		clock-names = "xvclk";
370		power-domains = <&power RV1126_PD_VI>;
371		pinctrl-names = "rockchip,camera_default";
372		pinctrl-0 = <&mipicsi_clk0>;
373		avdd-supply = <&vcc_avdd>;
374		dovdd-supply = <&vcc_dovdd>;
375		dvdd-supply = <&vcc_dvdd>;
376		pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
377		rockchip,camera-module-index = <1>;
378		rockchip,camera-module-facing = "front";
379		rockchip,camera-module-name = "CMK-OT1607-FV1";
380		rockchip,camera-module-lens-name = "M12-4IR-4MP-F16";
381		port {
382			ucam_out0: endpoint {
383				remote-endpoint = <&mipi_in_ucam0>;
384				data-lanes = <1 2 3 4>;
385			};
386		};
387
388	};
389};
390
391&i2s0_8ch {
392	status = "okay";
393	#sound-dai-cells = <0>;
394	rockchip,clk-trcm = <1>;
395	rockchip,i2s-rx-route = <3 1 2 0>;
396	pinctrl-names = "default";
397	pinctrl-0 = <&i2s0m0_sclk_tx
398		     &i2s0m0_lrck_tx
399		     &i2s0m0_sdo0
400		     &i2s0m0_sdo1_sdi3>;
401};
402
403&mdio {
404	phy: phy@0 {
405		compatible = "ethernet-phy-ieee802.3-c22";
406		reg = <0x0>;
407	};
408};
409
410&pmu_io_domains {
411	status = "okay";
412
413	pmuio0-supply = <&vcc1v8_pmu>;
414	pmuio1-supply = <&vcc3v3_sys>;
415	vccio4-supply = <&vcc_1v8>;
416	vccio5-supply = <&vcc_3v3>;
417	vccio6-supply = <&vcc_3v3>;
418	vccio7-supply = <&vcc_1v8>;
419};
420
421&rkisp_vir0 {
422	status = "okay";
423
424	ports {
425		port@0 {
426			reg = <0>;
427			#address-cells = <1>;
428			#size-cells = <0>;
429
430			isp_in: endpoint@0 {
431				reg = <0>;
432				remote-endpoint = <&csidphy0_out>;
433			};
434		};
435	};
436};
437
438&saradc {
439	status = "okay";
440	vref-supply = <&vcc_1v8>;
441};
442