1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "rv1126.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Rockchip RV1126 IO Test Board"; 12*4882a593Smuzhiyun compatible = "rockchip,rv1126-iotest", "rockchip,rv1126"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun vcc5v0_sys: vccsys { 19*4882a593Smuzhiyun compatible = "regulator-fixed"; 20*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 21*4882a593Smuzhiyun regulator-always-on; 22*4882a593Smuzhiyun regulator-boot-on; 23*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 24*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&cpu0 { 29*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&cpu_tsadc { 33*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 34*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 35*4882a593Smuzhiyun pinctrl-names = "gpio", "otpout"; 36*4882a593Smuzhiyun pinctrl-0 = <&tsadcm0_shut>; 37*4882a593Smuzhiyun pinctrl-1 = <&tsadc_shutorg>; 38*4882a593Smuzhiyun status = "okay"; 39*4882a593Smuzhiyun}; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun&emmc { 42*4882a593Smuzhiyun bus-width = <8>; 43*4882a593Smuzhiyun cap-mmc-highspeed; 44*4882a593Smuzhiyun non-removable; 45*4882a593Smuzhiyun mmc-hs200-1_8v; 46*4882a593Smuzhiyun rockchip,default-sample-phase = <90>; 47*4882a593Smuzhiyun no-sdio; 48*4882a593Smuzhiyun no-sd; 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&fiq_debugger { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&i2c0 { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun clock-frequency = <400000>; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun rk809: pmic@20 { 61*4882a593Smuzhiyun compatible = "rockchip,rk809"; 62*4882a593Smuzhiyun reg = <0x20>; 63*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 64*4882a593Smuzhiyun interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 65*4882a593Smuzhiyun pinctrl-names = "default", "pmic-sleep", 66*4882a593Smuzhiyun "pmic-power-off", "pmic-reset"; 67*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 68*4882a593Smuzhiyun pinctrl-1 = <&soc_slppin_gpio>, <&rk817_slppin_slp>; 69*4882a593Smuzhiyun pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 70*4882a593Smuzhiyun pinctrl-3 = <&soc_slppin_slp>, <&rk817_slppin_rst>; 71*4882a593Smuzhiyun rockchip,system-power-controller; 72*4882a593Smuzhiyun wakeup-source; 73*4882a593Smuzhiyun #clock-cells = <1>; 74*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 75*4882a593Smuzhiyun /* 0: rst the pmic, 1: rst regs (default in codes) */ 76*4882a593Smuzhiyun pmic-reset-func = <0>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 79*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 80*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 81*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 82*4882a593Smuzhiyun vcc5-supply = <&vcc_buck5>; 83*4882a593Smuzhiyun vcc6-supply = <&vcc_buck5>; 84*4882a593Smuzhiyun vcc7-supply = <&vcc5v0_sys>; 85*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 86*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun pwrkey { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun pinctrl_rk8xx: pinctrl_rk8xx { 93*4882a593Smuzhiyun gpio-controller; 94*4882a593Smuzhiyun #gpio-cells = <2>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /omit-if-no-ref/ 97*4882a593Smuzhiyun rk817_slppin_null: rk817_slppin_null { 98*4882a593Smuzhiyun pins = "gpio_slp"; 99*4882a593Smuzhiyun function = "pin_fun0"; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun /omit-if-no-ref/ 103*4882a593Smuzhiyun rk817_slppin_slp: rk817_slppin_slp { 104*4882a593Smuzhiyun pins = "gpio_slp"; 105*4882a593Smuzhiyun function = "pin_fun1"; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /omit-if-no-ref/ 109*4882a593Smuzhiyun rk817_slppin_pwrdn: rk817_slppin_pwrdn { 110*4882a593Smuzhiyun pins = "gpio_slp"; 111*4882a593Smuzhiyun function = "pin_fun2"; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /omit-if-no-ref/ 115*4882a593Smuzhiyun rk817_slppin_rst: rk817_slppin_rst { 116*4882a593Smuzhiyun pins = "gpio_slp"; 117*4882a593Smuzhiyun function = "pin_fun3"; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun regulators { 122*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 123*4882a593Smuzhiyun regulator-always-on; 124*4882a593Smuzhiyun regulator-boot-on; 125*4882a593Smuzhiyun regulator-min-microvolt = <725000>; 126*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 127*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 128*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 129*4882a593Smuzhiyun regulator-name = "vdd_logic"; 130*4882a593Smuzhiyun regulator-state-mem { 131*4882a593Smuzhiyun regulator-on-in-suspend; 132*4882a593Smuzhiyun regulator-suspend-microvolt = <800000>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 137*4882a593Smuzhiyun regulator-always-on; 138*4882a593Smuzhiyun regulator-boot-on; 139*4882a593Smuzhiyun regulator-min-microvolt = <725000>; 140*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 141*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 142*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 143*4882a593Smuzhiyun regulator-name = "vdd_arm"; 144*4882a593Smuzhiyun regulator-state-mem { 145*4882a593Smuzhiyun regulator-off-in-suspend; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 150*4882a593Smuzhiyun regulator-always-on; 151*4882a593Smuzhiyun regulator-boot-on; 152*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 153*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 154*4882a593Smuzhiyun regulator-state-mem { 155*4882a593Smuzhiyun regulator-on-in-suspend; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun vcc3v3_sys: DCDC_REG4 { 160*4882a593Smuzhiyun regulator-always-on; 161*4882a593Smuzhiyun regulator-boot-on; 162*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 163*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 164*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 165*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 166*4882a593Smuzhiyun regulator-state-mem { 167*4882a593Smuzhiyun regulator-on-in-suspend; 168*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun vcc_buck5: DCDC_REG5 { 173*4882a593Smuzhiyun regulator-always-on; 174*4882a593Smuzhiyun regulator-boot-on; 175*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 176*4882a593Smuzhiyun regulator-max-microvolt = <2200000>; 177*4882a593Smuzhiyun regulator-name = "vcc_buck5"; 178*4882a593Smuzhiyun regulator-state-mem { 179*4882a593Smuzhiyun regulator-on-in-suspend; 180*4882a593Smuzhiyun regulator-suspend-microvolt = <2200000>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun vcc_0v8: LDO_REG1 { 185*4882a593Smuzhiyun regulator-always-on; 186*4882a593Smuzhiyun regulator-boot-on; 187*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 188*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 189*4882a593Smuzhiyun regulator-name = "vcc_0v8"; 190*4882a593Smuzhiyun regulator-state-mem { 191*4882a593Smuzhiyun regulator-off-in-suspend; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun vcc1v8_pmu: LDO_REG2 { 196*4882a593Smuzhiyun regulator-always-on; 197*4882a593Smuzhiyun regulator-boot-on; 198*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 200*4882a593Smuzhiyun regulator-name = "vcc1v8_pmu"; 201*4882a593Smuzhiyun regulator-state-mem { 202*4882a593Smuzhiyun regulator-on-in-suspend; 203*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun vdd0v8_pmu: LDO_REG3 { 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun regulator-boot-on; 210*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 211*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 212*4882a593Smuzhiyun regulator-name = "vcc0v8_pmu"; 213*4882a593Smuzhiyun regulator-state-mem { 214*4882a593Smuzhiyun regulator-on-in-suspend; 215*4882a593Smuzhiyun regulator-suspend-microvolt = <800000>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun vcc_1v8: LDO_REG4 { 220*4882a593Smuzhiyun regulator-always-on; 221*4882a593Smuzhiyun regulator-boot-on; 222*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 223*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 224*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 225*4882a593Smuzhiyun regulator-state-mem { 226*4882a593Smuzhiyun regulator-on-in-suspend; 227*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun vcc_dovdd: LDO_REG5 { 232*4882a593Smuzhiyun regulator-boot-on; 233*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 234*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 235*4882a593Smuzhiyun regulator-name = "vcc_dovdd"; 236*4882a593Smuzhiyun regulator-state-mem { 237*4882a593Smuzhiyun regulator-off-in-suspend; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun vcc_dvdd: LDO_REG6 { 242*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 244*4882a593Smuzhiyun regulator-name = "vcc_dvdd"; 245*4882a593Smuzhiyun regulator-state-mem { 246*4882a593Smuzhiyun regulator-off-in-suspend; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun vcc_avdd: LDO_REG7 { 251*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 252*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 253*4882a593Smuzhiyun regulator-name = "vcc_avdd"; 254*4882a593Smuzhiyun regulator-state-mem { 255*4882a593Smuzhiyun regulator-off-in-suspend; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun vccio_sd: LDO_REG8 { 260*4882a593Smuzhiyun regulator-always-on; 261*4882a593Smuzhiyun regulator-boot-on; 262*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 263*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 264*4882a593Smuzhiyun regulator-name = "vccio_sd"; 265*4882a593Smuzhiyun regulator-state-mem { 266*4882a593Smuzhiyun regulator-off-in-suspend; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun vcc3v3_sd: LDO_REG9 { 271*4882a593Smuzhiyun regulator-always-on; 272*4882a593Smuzhiyun regulator-boot-on; 273*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 274*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 275*4882a593Smuzhiyun regulator-name = "vcc3v3_sd"; 276*4882a593Smuzhiyun regulator-state-mem { 277*4882a593Smuzhiyun regulator-off-in-suspend; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun vcc5v0_host: SWITCH_REG1 { 282*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun vcc_3v3: SWITCH_REG2 { 286*4882a593Smuzhiyun regulator-always-on; 287*4882a593Smuzhiyun regulator-boot-on; 288*4882a593Smuzhiyun regulator-name = "vcc_3v3"; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun}; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun&optee { 295*4882a593Smuzhiyun status = "disabled"; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&otp { 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&pinctrl { 303*4882a593Smuzhiyun pmic { 304*4882a593Smuzhiyun /omit-if-no-ref/ 305*4882a593Smuzhiyun pmic_int: pmic_int { 306*4882a593Smuzhiyun rockchip,pins = 307*4882a593Smuzhiyun <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun /omit-if-no-ref/ 311*4882a593Smuzhiyun soc_slppin_gpio: soc_slppin_gpio { 312*4882a593Smuzhiyun rockchip,pins = 313*4882a593Smuzhiyun <0 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /omit-if-no-ref/ 317*4882a593Smuzhiyun soc_slppin_slp: soc_slppin_slp { 318*4882a593Smuzhiyun rockchip,pins = 319*4882a593Smuzhiyun <0 RK_PB2 1 &pcfg_pull_none>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun /omit-if-no-ref/ 323*4882a593Smuzhiyun soc_slppin_rst: soc_slppin_rst { 324*4882a593Smuzhiyun rockchip,pins = 325*4882a593Smuzhiyun <0 RK_PB2 2 &pcfg_pull_none>; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun}; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun&pmu_io_domains { 331*4882a593Smuzhiyun status = "okay"; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun pmuio0-supply = <&vcc1v8_pmu>; 334*4882a593Smuzhiyun pmuio1-supply = <&vcc3v3_sys>; 335*4882a593Smuzhiyun vccio2-supply = <&vcc_3v3>; 336*4882a593Smuzhiyun vccio3-supply = <&vcc_3v3>; 337*4882a593Smuzhiyun vccio4-supply = <&vcc_3v3>; 338*4882a593Smuzhiyun vccio5-supply = <&vcc_3v3>; 339*4882a593Smuzhiyun vccio6-supply = <&vcc_3v3>; 340*4882a593Smuzhiyun vccio7-supply = <&vcc_3v3>; 341*4882a593Smuzhiyun}; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun&rng { 344*4882a593Smuzhiyun status = "okay"; 345*4882a593Smuzhiyun}; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun&u2phy0 { 348*4882a593Smuzhiyun status = "okay"; 349*4882a593Smuzhiyun u2phy_otg: otg-port { 350*4882a593Smuzhiyun status = "okay"; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&u2phy1 { 355*4882a593Smuzhiyun status = "okay"; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun u2phy_host: host-port { 358*4882a593Smuzhiyun status = "okay"; 359*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun}; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun&usb_host0_ehci { 364*4882a593Smuzhiyun status = "okay"; 365*4882a593Smuzhiyun}; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun&usb_host0_ohci { 368*4882a593Smuzhiyun status = "okay"; 369*4882a593Smuzhiyun}; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun&usbdrd { 372*4882a593Smuzhiyun status = "okay"; 373*4882a593Smuzhiyun}; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun&usbdrd_dwc3 { 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun extcon = <&u2phy0>; 378*4882a593Smuzhiyun}; 379