1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "rv1126-evb-v10.dtsi" 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun /delete-node/ vdd-npu; 9*4882a593Smuzhiyun /delete-node/ vdd-vepu; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun vdd_logic: vdd-logic { 12*4882a593Smuzhiyun compatible = "regulator-fixed"; 13*4882a593Smuzhiyun regulator-name = "vdd_logic"; 14*4882a593Smuzhiyun regulator-always-on; 15*4882a593Smuzhiyun regulator-boot-on; 16*4882a593Smuzhiyun regulator-min-microvolt = <810000>; 17*4882a593Smuzhiyun regulator-max-microvolt = <810000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&rk809 { 22*4882a593Smuzhiyun regulators { 23*4882a593Smuzhiyun /delete-node/ DCDC_REG1; 24*4882a593Smuzhiyun vdd_npu_vepu: DCDC_REG1 { 25*4882a593Smuzhiyun regulator-always-on; 26*4882a593Smuzhiyun regulator-boot-on; 27*4882a593Smuzhiyun regulator-min-microvolt = <650000>; 28*4882a593Smuzhiyun regulator-max-microvolt = <950000>; 29*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 30*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 31*4882a593Smuzhiyun regulator-name = "vdd_npu_vepu"; 32*4882a593Smuzhiyun regulator-state-mem { 33*4882a593Smuzhiyun regulator-off-in-suspend; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&ov4689 { 40*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&os04a10 { 44*4882a593Smuzhiyun reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&npu { 48*4882a593Smuzhiyun npu-supply = <&vdd_npu_vepu>; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&pwm0 { 52*4882a593Smuzhiyun status = "disabled"; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&pwm1 { 56*4882a593Smuzhiyun status = "disabled"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&rkvenc { 60*4882a593Smuzhiyun venc-supply = <&vdd_npu_vepu>; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&rkvenc_opp_table { 64*4882a593Smuzhiyun /* 65*4882a593Smuzhiyun * max IR-drop values on different freq condition for this board! 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun rockchip,board-irdrop = < 68*4882a593Smuzhiyun /* MHz MHz uV */ 69*4882a593Smuzhiyun 500 594 50000 70*4882a593Smuzhiyun >; 71*4882a593Smuzhiyun}; 72