xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1126-evb-ddr3-v13-dualcam-tb-emmc.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rv1126.dtsi"
8*4882a593Smuzhiyun#include "rv1126-evb-v13.dtsi"
9*4882a593Smuzhiyun#include "rv1126-thunder-boot-emmc.dtsi"
10*4882a593Smuzhiyun#include "rv1126-evb-thunder-boot.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Rockchip RV1126 EVB DDR3 V13 with eMMC (Dualcam Thunder Boot)";
14*4882a593Smuzhiyun	compatible = "rockchip,rv1126-evb-ddr3-v13-dualcam-tb-emmc", "rockchip,rv1126";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		bootargs = "loglevel=0 initcall_nr_threads=-1 initcall_debug=0 printk.devkmsg=on root=/dev/rd0 console=ttyFIQ0 snd_aloop.index=7 driver_async_probe=dwmmc_rockchip rk.root2nd=/dev/mmcblk0p7";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	pwmleds {
21*4882a593Smuzhiyun		compatible = "pwm-leds";
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		pwmi_ir {
24*4882a593Smuzhiyun			label = "PWM-IR";
25*4882a593Smuzhiyun			pwms = <&pwm11 0 25000 0>;
26*4882a593Smuzhiyun			max-brightness = <255>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	vcc1v2_dvdd: vcc1v2-dvdd {
31*4882a593Smuzhiyun		compatible = "regulator-fixed";
32*4882a593Smuzhiyun		regulator-name = "vcc1v2_dvdd";
33*4882a593Smuzhiyun		regulator-min-microvolt = <1200000>;
34*4882a593Smuzhiyun		regulator-max-microvolt = <1200000>;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	vcc2v8_avdd: vcc2v8-avdd {
38*4882a593Smuzhiyun		compatible = "regulator-fixed";
39*4882a593Smuzhiyun		regulator-name = "vcc2v8_avdd";
40*4882a593Smuzhiyun		regulator-min-microvolt = <2800000>;
41*4882a593Smuzhiyun		regulator-max-microvolt = <2800000>;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&csi_dphy0 {
46*4882a593Smuzhiyun	status = "okay";
47*4882a593Smuzhiyun	ports {
48*4882a593Smuzhiyun		port@0 {
49*4882a593Smuzhiyun			mipi_in_ucam0: endpoint@1 {
50*4882a593Smuzhiyun				remote-endpoint = <&ucam_out0>;
51*4882a593Smuzhiyun				data-lanes = <1 2>;
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun		port@1 {
55*4882a593Smuzhiyun			csidphy0_out: endpoint@0 {
56*4882a593Smuzhiyun				remote-endpoint = <&mipi_csi2_input>;
57*4882a593Smuzhiyun				data-lanes = <1 2>;
58*4882a593Smuzhiyun			};
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun&csi_dphy1 {
64*4882a593Smuzhiyun	status = "okay";
65*4882a593Smuzhiyun	ports {
66*4882a593Smuzhiyun		port@0 {
67*4882a593Smuzhiyun			csi_dphy1_input: endpoint@1 {
68*4882a593Smuzhiyun				remote-endpoint = <&ucam_out1>;
69*4882a593Smuzhiyun				data-lanes = <1 2>;
70*4882a593Smuzhiyun			};
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun		port@1 {
73*4882a593Smuzhiyun			csi_dphy1_output: endpoint@0 {
74*4882a593Smuzhiyun				remote-endpoint = <&isp_in>;
75*4882a593Smuzhiyun				data-lanes = <1 2>;
76*4882a593Smuzhiyun			};
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&i2c1 {
82*4882a593Smuzhiyun	/delete-node/ ar0230@10;
83*4882a593Smuzhiyun	/delete-node/ ov4689@36;
84*4882a593Smuzhiyun	/delete-node/ os04a10@36;
85*4882a593Smuzhiyun	ov2718: ov2718@10 {
86*4882a593Smuzhiyun		compatible = "ovti,ov2718";
87*4882a593Smuzhiyun		reg = <0x10>;
88*4882a593Smuzhiyun		clocks = <&cru CLK_MIPICSI_OUT>;
89*4882a593Smuzhiyun		clock-names = "xvclk";
90*4882a593Smuzhiyun		power-domains = <&power RV1126_PD_VI>;
91*4882a593Smuzhiyun		pinctrl-names = "rockchip,camera_default";
92*4882a593Smuzhiyun		pinctrl-0 = <&mipicsi_clk1>;
93*4882a593Smuzhiyun		avdd-supply = <&vcc_avdd>;
94*4882a593Smuzhiyun		dovdd-supply = <&vcc_dovdd>;
95*4882a593Smuzhiyun		dvdd-supply = <&vcc_dvdd>;
96*4882a593Smuzhiyun		pwd-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
97*4882a593Smuzhiyun		reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
98*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
99*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
100*4882a593Smuzhiyun		rockchip,camera-module-name = "YT-RV1109-3-V1";
101*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "M43-4IR-2MP-F2";
102*4882a593Smuzhiyun		ir-cut = <&cam_ircut0>;
103*4882a593Smuzhiyun		port {
104*4882a593Smuzhiyun			ucam_out1: endpoint {
105*4882a593Smuzhiyun				remote-endpoint = <&csi_dphy1_input>;
106*4882a593Smuzhiyun				data-lanes = <1 2>;
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	gc2053: gc2053@37 {
112*4882a593Smuzhiyun		compatible = "galaxycore,gc2053";
113*4882a593Smuzhiyun		reg = <0x37>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		clocks = <&cru CLK_MIPICSI_OUT>;
116*4882a593Smuzhiyun		clock-names = "xvclk";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		power-domains = <&power RV1126_PD_VI>;
119*4882a593Smuzhiyun		pinctrl-names = "rockchip,camera_default";
120*4882a593Smuzhiyun		pinctrl-0 = <&mipicsi_clk0>;
121*4882a593Smuzhiyun		power-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
122*4882a593Smuzhiyun		pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_LOW>;
123*4882a593Smuzhiyun		reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun		avdd-supply = <&vcc2v8_avdd>;
126*4882a593Smuzhiyun		dovdd-supply = <&vcc_dovdd>;
127*4882a593Smuzhiyun		dvdd-supply = <&vcc1v2_dvdd>;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
130*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
131*4882a593Smuzhiyun		rockchip,camera-module-name = "YT-RV1109-2-V1";
132*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "40IR-2MP-F20";
133*4882a593Smuzhiyun		port {
134*4882a593Smuzhiyun			ucam_out0: endpoint {
135*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam0>;
136*4882a593Smuzhiyun				data-lanes = <1 2>;
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun/* isp cma buffer don't fiddle with it, dual camera(1920 * 1080) need 92M buffer */
143*4882a593Smuzhiyun&isp_reserved {
144*4882a593Smuzhiyun	size = <0x5c00000>;
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&mipi_csi2 {
148*4882a593Smuzhiyun	status = "okay";
149*4882a593Smuzhiyun	ports {
150*4882a593Smuzhiyun		port@0 {
151*4882a593Smuzhiyun			mipi_csi2_input: endpoint@1 {
152*4882a593Smuzhiyun				remote-endpoint = <&csidphy0_out>;
153*4882a593Smuzhiyun				data-lanes = <1 2>;
154*4882a593Smuzhiyun			};
155*4882a593Smuzhiyun		};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		port@1 {
158*4882a593Smuzhiyun			mipi_csi2_output: endpoint@0 {
159*4882a593Smuzhiyun				remote-endpoint = <&cif_mipi_in>;
160*4882a593Smuzhiyun				data-lanes = <1 2>;
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun		};
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&pwm11 {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun	pinctrl-names = "active";
169*4882a593Smuzhiyun	pinctrl-0 = <&pwm11m1_pins_pull_down>;
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&rk809 {
173*4882a593Smuzhiyun	regulators {
174*4882a593Smuzhiyun		vcc_dvdd: LDO_REG6 {
175*4882a593Smuzhiyun			regulator-min-microvolt = <1300000>;
176*4882a593Smuzhiyun			regulator-max-microvolt = <1300000>;
177*4882a593Smuzhiyun		};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun		vcc_avdd: LDO_REG7 {
180*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
181*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun&rkcif_mipi_lvds {
187*4882a593Smuzhiyun	status = "okay";
188*4882a593Smuzhiyun	port {
189*4882a593Smuzhiyun		cif_mipi_in: endpoint {
190*4882a593Smuzhiyun			remote-endpoint = <&mipi_csi2_output>;
191*4882a593Smuzhiyun			data-lanes = <1 2>;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf {
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun	port {
200*4882a593Smuzhiyun		cif_sditf: endpoint {
201*4882a593Smuzhiyun			remote-endpoint = <&isp_virt1_in>;
202*4882a593Smuzhiyun			data-lanes = <1 2 3 4>;
203*4882a593Smuzhiyun		};
204*4882a593Smuzhiyun	};
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&rkisp_vir0 {
208*4882a593Smuzhiyun	ports {
209*4882a593Smuzhiyun		port@0 {
210*4882a593Smuzhiyun			isp_in: endpoint@0 {
211*4882a593Smuzhiyun				remote-endpoint = <&csi_dphy1_output>;
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun		};
214*4882a593Smuzhiyun	};
215*4882a593Smuzhiyun};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun&rkisp_vir1 {
218*4882a593Smuzhiyun	status = "okay";
219*4882a593Smuzhiyun	ports {
220*4882a593Smuzhiyun		port@0 {
221*4882a593Smuzhiyun			reg = <0>;
222*4882a593Smuzhiyun			#address-cells = <1>;
223*4882a593Smuzhiyun			#size-cells = <0>;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun			isp_virt1_in: endpoint@0 {
226*4882a593Smuzhiyun				reg = <0>;
227*4882a593Smuzhiyun				remote-endpoint = <&cif_sditf>;
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun	};
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&rkispp_vir1 {
234*4882a593Smuzhiyun	status = "okay";
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&rkispp {
238*4882a593Smuzhiyun	status = "okay";
239*4882a593Smuzhiyun	/* the max input w h and fps of mulit sensor */
240*4882a593Smuzhiyun	max-input = <1920 1080 30>;
241*4882a593Smuzhiyun};
242