xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1108-minievb-v10.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun/dts-v1/;
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun#include "rv1108.dtsi"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	model = "Rockchip RV1108 MINIEVB v10 board";
9*4882a593Smuzhiyun	compatible = "rockchip,rv1108-minievb-v10", "rockchip,rv1108";
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	memory@60000000 {
12*4882a593Smuzhiyun		device_type = "memory";
13*4882a593Smuzhiyun		reg = <0x60000000 0x08000000>;
14*4882a593Smuzhiyun	};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		bootargs = "earlycon=uart8250,mmio32,0x10210000 noinitrd root=PARTUUID=614e0000-0000 rootfstype=squashfs";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	backlight: backlight {
21*4882a593Smuzhiyun		compatible = "pwm-backlight";
22*4882a593Smuzhiyun		brightness-levels = <
23*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
24*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
25*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
26*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
27*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
28*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
29*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
30*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
31*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
32*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
33*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
34*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
35*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
36*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
37*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
38*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
39*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
40*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
41*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
42*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
43*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
44*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
45*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
46*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
47*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
48*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
49*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
50*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
51*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
52*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
53*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
54*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
55*4882a593Smuzhiyun		default-brightness-level = <200>;
56*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
60*4882a593Smuzhiyun		compatible = "regulator-fixed";
61*4882a593Smuzhiyun		regulator-name = "vsys";
62*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
63*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
64*4882a593Smuzhiyun		regulator-boot-on;
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&cpu0 {
69*4882a593Smuzhiyun	cpu-supply = <&vdd_core>;
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&fiq_debugger {
73*4882a593Smuzhiyun	status = "okay";
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&i2c0 {
77*4882a593Smuzhiyun	status = "okay";
78*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <275>;
79*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <16>;
80*4882a593Smuzhiyun	clock-frequency = <400000>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	rk805: pmic@18 {
83*4882a593Smuzhiyun		compatible = "rockchip,rk805";
84*4882a593Smuzhiyun		reg = <0x18>;
85*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
86*4882a593Smuzhiyun		interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
87*4882a593Smuzhiyun		rockchip,system-power-controller;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
90*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
91*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
92*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
93*4882a593Smuzhiyun		vcc5-supply = <&vcc_sys>;
94*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		regulators {
97*4882a593Smuzhiyun			vdd_core: DCDC_REG1 {
98*4882a593Smuzhiyun				regulator-name= "vdd_core";
99*4882a593Smuzhiyun				regulator-min-microvolt = <700000>;
100*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
101*4882a593Smuzhiyun				regulator-always-on;
102*4882a593Smuzhiyun				regulator-boot-on;
103*4882a593Smuzhiyun				regulator-state-mem {
104*4882a593Smuzhiyun					regulator-state-enabled;
105*4882a593Smuzhiyun					regulator-state-uv = <900000>;
106*4882a593Smuzhiyun				};
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun			vdd_cam: DCDC_REG2 {
110*4882a593Smuzhiyun				regulator-name= "vdd_cam";
111*4882a593Smuzhiyun				regulator-min-microvolt = <700000>;
112*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
113*4882a593Smuzhiyun				regulator-state-mem {
114*4882a593Smuzhiyun					regulator-state-disabled;
115*4882a593Smuzhiyun				};
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
119*4882a593Smuzhiyun				regulator-name= "vcc_ddr";
120*4882a593Smuzhiyun				regulator-always-on;
121*4882a593Smuzhiyun				regulator-boot-on;
122*4882a593Smuzhiyun				regulator-state-mem {
123*4882a593Smuzhiyun					regulator-state-enabled;
124*4882a593Smuzhiyun				};
125*4882a593Smuzhiyun			};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
128*4882a593Smuzhiyun				regulator-name= "vcc_io";
129*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
130*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
131*4882a593Smuzhiyun				regulator-always-on;
132*4882a593Smuzhiyun				regulator-boot-on;
133*4882a593Smuzhiyun				regulator-state-mem {
134*4882a593Smuzhiyun					regulator-state-enabled;
135*4882a593Smuzhiyun					regulator-state-uv = <3300000>;
136*4882a593Smuzhiyun				};
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun			vdd_10: LDO_REG1 {
140*4882a593Smuzhiyun				regulator-name= "vdd_10";
141*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
142*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
143*4882a593Smuzhiyun				regulator-always-on;
144*4882a593Smuzhiyun				regulator-boot-on;
145*4882a593Smuzhiyun				regulator-state-mem {
146*4882a593Smuzhiyun					regulator-state-disabled;
147*4882a593Smuzhiyun				};
148*4882a593Smuzhiyun			};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun			vcc_18: LDO_REG2 {
151*4882a593Smuzhiyun				regulator-name= "vcc_18";
152*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
153*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
154*4882a593Smuzhiyun				regulator-always-on;
155*4882a593Smuzhiyun				regulator-boot-on;
156*4882a593Smuzhiyun				regulator-state-mem {
157*4882a593Smuzhiyun					regulator-state-disabled;
158*4882a593Smuzhiyun				};
159*4882a593Smuzhiyun			};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun			vdd10_pmu: LDO_REG3 {
162*4882a593Smuzhiyun				regulator-name= "vdd10_pmu";
163*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
164*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
165*4882a593Smuzhiyun				regulator-always-on;
166*4882a593Smuzhiyun				regulator-boot-on;
167*4882a593Smuzhiyun				regulator-state-mem {
168*4882a593Smuzhiyun					regulator-state-enabled;
169*4882a593Smuzhiyun					regulator-state-uv = <1000000>;
170*4882a593Smuzhiyun				};
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun		};
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun	bma250: accelerometer@19 {
176*4882a593Smuzhiyun		compatible = "bosch,bma250e";
177*4882a593Smuzhiyun		reg = <0x19>;
178*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
179*4882a593Smuzhiyun		interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun&pwm0 {
184*4882a593Smuzhiyun	status = "okay";
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&sdmmc {
188*4882a593Smuzhiyun	status = "okay";
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&sfc {
192*4882a593Smuzhiyun	status = "okay";
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&tsadc {
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&u2phy {
200*4882a593Smuzhiyun	status = "okay";
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	u2phy_host: host-port {
203*4882a593Smuzhiyun		status = "okay";
204*4882a593Smuzhiyun	};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun	u2phy_otg: otg-port {
207*4882a593Smuzhiyun		status = "okay";
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&usb_host_ehci {
212*4882a593Smuzhiyun	status = "okay";
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&usb_host_ohci {
216*4882a593Smuzhiyun	status = "okay";
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&usb_otg {
220*4882a593Smuzhiyun	status = "okay";
221*4882a593Smuzhiyun};
222