1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/* 4*4882a593Smuzhiyun * Copyright (C) 2018 O.S. Systems Software LTDA. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "rv1108.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Elgin RV1108 R1 board"; 13*4882a593Smuzhiyun compatible = "elgin,rv1108-r1", "rockchip,rv1108"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory@60000000 { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x60000000 0x08000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun vcc_sys: vsys-regulator { 25*4882a593Smuzhiyun compatible = "regulator-fixed"; 26*4882a593Smuzhiyun regulator-name = "vsys"; 27*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 28*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 29*4882a593Smuzhiyun regulator-boot-on; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&cpu0 { 34*4882a593Smuzhiyun cpu-supply = <&vdd_core>; 35*4882a593Smuzhiyun}; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun&emmc { 38*4882a593Smuzhiyun bus-width = <8>; 39*4882a593Smuzhiyun cap-mmc-highspeed; 40*4882a593Smuzhiyun no-sd; 41*4882a593Smuzhiyun no-sdio; 42*4882a593Smuzhiyun non-removable; 43*4882a593Smuzhiyun mmc-ddr-1_8v; 44*4882a593Smuzhiyun mmc-hs200-1_8v; 45*4882a593Smuzhiyun pinctrl-names = "default"; 46*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&gmac { 51*4882a593Smuzhiyun clock_in_out = "output"; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&rmii_pins>; 54*4882a593Smuzhiyun snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; 55*4882a593Smuzhiyun snps,reset-active-low; 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&i2c0 { 60*4882a593Smuzhiyun clock-frequency = <400000>; 61*4882a593Smuzhiyun i2c-scl-rising-time-ns = <275>; 62*4882a593Smuzhiyun i2c-scl-falling-time-ns = <16>; 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun rk805: pmic@18 { 66*4882a593Smuzhiyun compatible = "rockchip,rk805"; 67*4882a593Smuzhiyun reg = <0x18>; 68*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 69*4882a593Smuzhiyun interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; 70*4882a593Smuzhiyun rockchip,system-power-controller; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 73*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 74*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 75*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 76*4882a593Smuzhiyun vcc5-supply = <&vdd_buck2>; 77*4882a593Smuzhiyun vcc6-supply = <&vdd_buck2>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun regulators { 80*4882a593Smuzhiyun vdd_core: DCDC_REG1 { 81*4882a593Smuzhiyun regulator-name= "vdd_core"; 82*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 83*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 84*4882a593Smuzhiyun regulator-always-on; 85*4882a593Smuzhiyun regulator-boot-on; 86*4882a593Smuzhiyun regulator-state-mem { 87*4882a593Smuzhiyun regulator-on-in-suspend; 88*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun vdd_buck2: DCDC_REG2 { 93*4882a593Smuzhiyun regulator-name= "vdd_buck2"; 94*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 95*4882a593Smuzhiyun regulator-max-microvolt = <2200000>; 96*4882a593Smuzhiyun regulator-always-on; 97*4882a593Smuzhiyun regulator-boot-on; 98*4882a593Smuzhiyun regulator-state-mem { 99*4882a593Smuzhiyun regulator-off-in-suspend; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 104*4882a593Smuzhiyun regulator-name= "vcc_ddr"; 105*4882a593Smuzhiyun regulator-always-on; 106*4882a593Smuzhiyun regulator-boot-on; 107*4882a593Smuzhiyun regulator-state-mem { 108*4882a593Smuzhiyun regulator-on-in-suspend; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 113*4882a593Smuzhiyun regulator-name= "vcc_io"; 114*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 115*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun regulator-boot-on; 118*4882a593Smuzhiyun regulator-state-mem { 119*4882a593Smuzhiyun regulator-on-in-suspend; 120*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun vdd_10: LDO_REG1 { 125*4882a593Smuzhiyun regulator-name= "vdd_10"; 126*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 127*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 128*4882a593Smuzhiyun regulator-always-on; 129*4882a593Smuzhiyun regulator-boot-on; 130*4882a593Smuzhiyun regulator-state-mem { 131*4882a593Smuzhiyun regulator-off-in-suspend; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun vcc_18: LDO_REG2 { 136*4882a593Smuzhiyun regulator-name= "vcc_18"; 137*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 138*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 139*4882a593Smuzhiyun regulator-always-on; 140*4882a593Smuzhiyun regulator-boot-on; 141*4882a593Smuzhiyun regulator-state-mem { 142*4882a593Smuzhiyun regulator-off-in-suspend; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun vdd10_pmu: LDO_REG3 { 147*4882a593Smuzhiyun regulator-name= "vdd10_pmu"; 148*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 149*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 150*4882a593Smuzhiyun regulator-always-on; 151*4882a593Smuzhiyun regulator-boot-on; 152*4882a593Smuzhiyun regulator-state-mem { 153*4882a593Smuzhiyun regulator-on-in-suspend; 154*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun&spi { 162*4882a593Smuzhiyun pinctrl-names = "default"; 163*4882a593Smuzhiyun pinctrl-0 = <&spim1_clk &spim1_cs0 &spim1_tx &spim1_rx>; 164*4882a593Smuzhiyun status = "okay"; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun dh2228fv: dac@0 { 167*4882a593Smuzhiyun compatible = "rohm,dh2228fv"; 168*4882a593Smuzhiyun reg = <0>; 169*4882a593Smuzhiyun spi-max-frequency = <24000000>; 170*4882a593Smuzhiyun spi-cpha; 171*4882a593Smuzhiyun spi-cpol; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun}; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun&u2phy { 176*4882a593Smuzhiyun status = "okay"; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun u2phy_host: host-port { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun u2phy_otg: otg-port { 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&uart0 { 188*4882a593Smuzhiyun pinctrl-names = "default"; 189*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer>; 190*4882a593Smuzhiyun status = "okay"; 191*4882a593Smuzhiyun}; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun&uart2 { 194*4882a593Smuzhiyun status = "okay"; 195*4882a593Smuzhiyun}; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun&usb_host_ehci { 198*4882a593Smuzhiyun status = "okay"; 199*4882a593Smuzhiyun}; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun&usb_host_ohci { 202*4882a593Smuzhiyun status = "okay"; 203*4882a593Smuzhiyun}; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun&usb_otg { 206*4882a593Smuzhiyun status = "okay"; 207*4882a593Smuzhiyun}; 208